modify nuttx bug of lack of files

This commit is contained in:
TangYiwen123
2021-06-11 11:25:07 +08:00
parent 4a7f51a5e9
commit 6d0f2ca39a
6752 changed files with 1528133 additions and 0 deletions
@@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_AXOLOTI
endif
@@ -0,0 +1,20 @@
README
======
This README discusses issues unique to NuttX configurations for the
Axoloti open source synthesizer board featuring the STM32F427IGH6
MCU. The STM32F427IGH6 has a 180MHz Cortex-M4 core with 1MiB Flash
memory and 256KiB of SRAM. The board features:
- ADAU1961 24-bit 96 kHz stereo CODEC
- 1/4" in/out jacks for analog audio signals
- 3.5 mm jack for analog audio signals
- 8 MiB of SDRAM (Alliance Memory AS4C4M16SA)
- Serial MIDI in/out ports
- SD Card slot
- Two user LEDs and one (GPIO) push-button
- USB OTG FS with Micro-AB connector (USB device mode operation)
- USB OTG HS with Type-A connector (USB host mode operation)
- Easy access to most IO pins
Refer to http://www.axoloti.com/ for further information about this board.
@@ -0,0 +1,42 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_ARCH_LEDS is not set
# CONFIG_NSH_DISABLE_PRINTF is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="axoloti"
CONFIG_ARCH_BOARD_AXOLOTI=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F427I=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_CLOCK_MONOTONIC=y
CONFIG_INPUT=y
CONFIG_INPUT_BUTTONS=y
CONFIG_INPUT_BUTTONS_LOWER=y
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_MM_REGIONS=2
CONFIG_NSH_ARCHINIT=y
CONFIG_RAW_BINARY=y
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_FULL_ENABLE=y
CONFIG_STM32_USART1=y
CONFIG_STM32_USART6=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART1_SERIAL_CONSOLE=y
CONFIG_USART6_BAUD=31250
CONFIG_USART6_RXBUFSIZE=128
CONFIG_USART6_TXBUFSIZE=32
CONFIG_USERLED=y
CONFIG_USERLED_LOWER=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,276 @@
/****************************************************************************
* boards/arm/stm32/axoloti/include/board.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_AXOLOTI_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_AXOLOTI_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Clocking
* The Axoloti board has an external 8MHz crystal.
* The SoC can run at 180MHz, but the required USB clock of 48MHz cannot be
* configured at that system clock rate, so the core clock is 168MHz.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 8000000 (STM32_BOARD_XTAL)
* PLLM : 8 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator
* output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for
* USB OTG FS,
* SDIO and RNG clock : Enabled
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* HSE - On-board crystal frequency is 8MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 8000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* = (8,000,000 / 8) * 336
* = 336,000,000
* SYSCLK = PLL_VCO / PLLP
* = 336,000,000 / 2 = 168,000,000
* USB OTG FS, SDIO and RNG Clock
* = PLL_VCO / PLLQ
* = 48,000,000
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(8)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
#define STM32_SYSCLK_FREQUENCY 168000000ul
/* AHB clock (HCLK) is SYSCLK (168MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/****************************************************************************
* LED Definitions
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_NLEDS 2
#define BOARD_LED_GREEN BOARD_LED1
#define BOARD_LED_RED BOARD_LED2
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/****************************************************************************
* Button Definitions
* There are two buttons on the axoloti, one of them is GPIO connected. The
* other is a reset button and is not under software control.
*/
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/****************************************************************************
* UARTs
* The MIDI in/out ports of the axoloti are connected on USART6.
* It maybe convenient to run a serial port connected to the header pins,
* so we can optionally use USART1 for that.
*/
/* USART1 - console on header pins */
#define GPIO_USART1_RX GPIO_USART1_RX_2 /* AF7, PB7 */
#define GPIO_USART1_TX GPIO_USART1_TX_2 /* AF7, PB6 */
/* USART6 - midi in/out */
#define GPIO_USART6_RX (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN9| \
GPIO_PULLUP|GPIO_SPEED_2MHz|GPIO_PUSHPULL)
#define GPIO_USART6_TX (GPIO_ALT|GPIO_AF8|GPIO_PORTG|GPIO_PIN14| \
GPIO_FLOAT|GPIO_SPEED_2MHz|GPIO_OPENDRAIN)
/****************************************************************************
* I2C Bus
* Turn on the internal pullups since there are no external pullups.
*/
/* I2C1 - for external devices */
#define GPIO_I2C1_SCL (GPIO_ALT|GPIO_AF4|GPIO_PORTB|GPIO_PIN8| \
GPIO_SPEED_2MHz|GPIO_OPENDRAIN|GPIO_PULLUP)
#define GPIO_I2C1_SDA (GPIO_ALT|GPIO_AF4|GPIO_PORTB|GPIO_PIN9| \
GPIO_SPEED_2MHz|GPIO_OPENDRAIN|GPIO_PULLUP)
/* I2C3 - for the ADAU1961 codec */
#define GPIO_I2C3_SCL (GPIO_ALT|GPIO_AF4|GPIO_PORTH|GPIO_PIN7| \
GPIO_SPEED_2MHz|GPIO_OPENDRAIN|GPIO_PULLUP)
#define GPIO_I2C3_SDA (GPIO_ALT|GPIO_AF4|GPIO_PORTH|GPIO_PIN8| \
GPIO_SPEED_2MHz|GPIO_OPENDRAIN|GPIO_PULLUP)
/****************************************************************************
* SAI Bus
* Used with the ADAU1961 CODEC
* PE3_SAI1_SD_B (GPIO_SAI1_SD_B_1)
* PE4_SAI1_FS_A (GPIO_SAI1_FS_A)
* PE5_SAI1_SCK_A (GPIO_SAI1_SCK_A)
* PE6_SAI1_SD_A (GPIO_SAI1_SD_A_2)
* PA8_MCO1
*/
#define GPIO_SAI1_SD_B GPIO_SAI1_SD_B_1 /* AF6, PE3 */
#define GPIO_SAI1_SD_A GPIO_SAI1_SD_A_2 /* AF6, PE6 */
#define STM32_SAI1_FREQUENCY (48000 * 2 * 256) /* TODO ?? */
/* DAC DMA to Codec
* dma 2, stream 1, channel 0
* memory to peripheral
* 32 bits
*/
#define DMACHAN_SAI1_A DMAMAP_SAI1_A_1
/* ADC DMA from Codec
* dma 2, stream 4, channel 1,
* peripheral to memory
* 32 bits
*/
#define DMACHAN_SAI1_B DMAMAP_SAI1_B_2
/****************************************************************************
* SDIO
* Used for the SD card interface.
* d0 (AF12, PC8)
* d1 (AF12, PC9)
* d2 (AF12, PC10)
* d3 (AF12, PC11)
* clk (AF12, PC12)
* cmd (AF12, PD2)
* cd1 PD13
*/
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* dma 2, stream 6, channel 4 */
#define DMAMAP_SDIO DMAMAP_SDIO_2
#endif /* __BOARDS_ARM_STM32_AXOLOTI_INCLUDE_BOARD_H */
@@ -0,0 +1,87 @@
############################################################################
# boards/arm/stm32/axoloti/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = ld.script
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
else
LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
endif
# ELF module definitions
CELFFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
CXXELFFLAGS = $(CXXFLAGS) -mlong-calls # --target1-abs
LDELFFLAGS = -r -e main
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
LDELFFLAGS += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld}"
else
LDELFFLAGS += -T $(BOARD_DIR)$(DELIM)scripts$(DELIM)gnu-elf.ld
endif
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,126 @@
/****************************************************************************
* boards/arm/stm32/axoloti/scripts/gnu-elf.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,97 @@
/****************************************************************************
* boards/arm/stm32/axoloti/scripts/kernel-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab : {
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,117 @@
/****************************************************************************
* boards/arm/stm32/axoloti/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F427IGH6 has 1024KiB of FLASH beginning at address 0x0800:0000 and
* 256KiB of SRAM. SRAM is split up into four blocks:
*
* 1) 112KiB of SRAM beginning at address 0x2000:0000
* 2) 16KiB of SRAM beginning at address 0x2001:c000
* 3) 64KiB of SRAM beginning at address 0x2002:0000
* 4) 64KiB of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address
* range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The RAM vector table (if present) should lie at the beginning of SRAM */
.ram_vectors : {
*(.ram_vectors)
} > sram
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,86 @@
/****************************************************************************
* boards/arm/stm32/axoloti/scripts/memory.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F427IGH6 has 1024KiB of FLASH beginning at address 0x0800:0000 and
* 256KiB of SRAM. SRAM is split up into four blocks:
*
* 1) 112KiB of SRAM beginning at address 0x2000:0000
* 2) 16KiB of SRAM beginning at address 0x2001:c000
* 3) 64KiB of SRAM beginning at address 0x2002:0000
* 4) 64KiB of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also boards/arm/stm32/axoloti/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20000 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20000 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20000 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20001 c000: End+1 of CPU RAM
*/
MEMORY
{
/* 1024Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 112Kb of contiguous SRAM */
ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K
}
@@ -0,0 +1,111 @@
/****************************************************************************
* boards/arm/stm32/axoloti/scripts/user-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
/* Make sure that the critical memory management functions are in user-space.
* the user heap memory manager will reside in user-space but be usable both
* by kernel- and user-space code
*/
EXTERN(umm_initialize)
EXTERN(umm_addregion)
EXTERN(malloc)
EXTERN(realloc)
EXTERN(zalloc)
EXTERN(free)
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace : {
*(.userspace)
} > uflash
.text : {
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab : {
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,72 @@
############################################################################
# boards/arm/stm32/axoloti/src/Make.defs
#
# Copyright (C) 2019 Gregory Nutt. All rights reserved.
# Author: Jason T. Harris <sirmanlypowers@gmail.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_bringup.c
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
ifeq ($(CONFIG_STM32_FMC),y)
CSRCS += stm32_extmem.c
endif
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_AUDIO_ADAU1961),y)
CSRCS += stm32_adau1961.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_STM32_SDIO),y)
CSRCS += stm32_sdio.c
endif
ifeq ($(CONFIG_USBHOST),y)
CSRCS += stm32_usbhost.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,253 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/axoloti.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_AXOLOTI_SRC_AXOLOTI_H
#define __BOARDS_ARM_STM32_AXOLOTI_SRC_AXOLOTI_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
#include <arch/stm32/chip.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* configuration
*/
/* Assume that we have everything */
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_SDIO 1
#define HAVE_ADAU1961 1
#define HAVE_SDRAM 1
/* Can't support USB host if USB OTG HS is not enabled */
#if !defined(CONFIG_STM32_OTGHS) || !defined(CONFIG_USBHOST)
# undef HAVE_USBHOST
#endif
/* Can't support USB device if USB OTG FS is not enabled */
#if !defined(CONFIG_STM32_OTGFS) || !defined(CONFIG_USBDEV)
# undef HAVE_USBDEV
#endif
/* Can't support MMC/SD features if mountpoints or SDIO support are
* disabled
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT) || !defined(CONFIG_STM32_SDIO)
# undef HAVE_SDIO
#endif
/* The ADAU1961 depends on the ADAU1961 driver, I2C3, and SAI1 support */
#if !defined(CONFIG_AUDIO_ADAU1961) || !defined(CONFIG_STM32_I2C3) || \
!defined(CONFIG_STM32_SAI1)
# undef HAVE_ADAU1961
#endif
/* Can't support SDRAM if the memory controller is disabled */
#if !defined(CONFIG_STM32_FMC)
# undef HAVE_SDRAM
#endif
/****************************************************************************
* Audio Configuration
*/
#define ADAU1961_I2C_BUS 3 /* i2c3 */
#define ADAU1961_I2C_ADDRESS 0x38
#define ADAU1961_SAI_BUS SAI1_BLOCK_A
/****************************************************************************
* SDIO Configuration
*/
#define SDIO_MINOR CONFIG_NSH_MMCSDMINOR
#define SDIO_SLOTNO CONFIG_NSH_MMCSDSLOTNO
/* SD Slot Card detect */
#define GPIO_SDIO_NCD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTD|GPIO_PIN13)
/****************************************************************************
* PROC File System Configuration
*/
#ifdef CONFIG_FS_PROCFS
# ifdef CONFIG_NSH_PROC_MOUNTPOINT
# define STM32_PROCFS_MOUNTPOINT CONFIG_NSH_PROC_MOUNTPOINT
# else
# define STM32_PROCFS_MOUNTPOINT "/proc"
# endif
#endif
/****************************************************************************
* LEDs
*/
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTG|GPIO_PIN6)
#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
/****************************************************************************
* Buttons
*/
#define MIN_IRQBUTTON BUTTON_USER
#define MAX_IRQBUTTON BUTTON_USER
#define NUM_IRQBUTTONS 1
#define GPIO_BTN_USER (GPIO_INPUT|GPIO_PULLDOWN|GPIO_EXTI|GPIO_PORTA|GPIO_PIN10)
/****************************************************************************
* USB Host (OTG High Speed)
*/
#define GPIO_OTGHS_PWRON (GPIO_OUTPUT|GPIO_OUTPUT_SET|GPIO_FLOAT| \
GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTD|GPIO_PIN7)
#define GPIO_OTGHS_OVER (GPIO_INPUT|GPIO_EXTI|GPIO_FLOAT| \
GPIO_SPEED_100MHz|GPIO_PUSHPULL|GPIO_PORTG|GPIO_PIN13)
/* #define GPIO_OTGHS_VBUS no vbus monitoring.... */
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
#if !defined(CONFIG_DISABLE_MOUNTPOINT) && defined(CONFIG_STM32_SDIO)
int stm32_sdio_initialize(void);
#endif
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in initialization to setup
* USB-related GPIO pins for the STM32F4Discovery board.
*
****************************************************************************/
#ifdef CONFIG_STM32_OTGHS
void weak_function stm32_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/
#if defined(CONFIG_STM32_OTGHS) && defined(CONFIG_USBHOST)
int stm32_usbhost_initialize(void);
#endif
/****************************************************************************
* Name: stm32_adau1961_initialize
*
* Description:
* Called from stm32_bringup to initialize the adau1961 audio driver.
*
****************************************************************************/
#if defined(HAVE_ADAU1961)
int stm32_adau1961_initialize(int minor);
#endif
/****************************************************************************
* Name: stm32_sdram_initialize
*
* Description:
* Called from stm32_bringup to initialize external SDRAM access.
*
****************************************************************************/
#if defined(HAVE_SDRAM)
int stm32_sdram_initialize(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32_AXOLOTI_SRC_AXOLOTI_H */
@@ -0,0 +1,222 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_adau1961.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <assert.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/i2c/i2c_master.h>
#include <nuttx/audio/i2s.h>
#include <nuttx/audio/adau1961.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "axoloti.h"
#ifdef HAVE_ADAU1961
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_mwinfo_s
{
/* Standard ADAU1961 interface */
struct adau1961_lower_s lower;
};
/****************************************************************************
* Private Functions
****************************************************************************/
static int adau1961_attach(FAR const struct adau1961_lower_s *lower,
adau1961_handler_t isr, FAR void *arg)
{
audinfo("TODO\n");
return 0;
}
static bool adau1961_enable(FAR const struct adau1961_lower_s *lower,
bool enable)
{
audinfo("TODO\n");
return 0;
}
static void adau1961_hw_reset(FAR const struct adau1961_lower_s *lower)
{
audinfo("TODO\n");
}
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the ADAU1961
* driver. This structure provides information about the configuration
* of the ADAU1961 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active.
*/
static struct stm32_mwinfo_s g_adau1961info =
{
.lower =
{
.address = ADAU1961_I2C_ADDRESS,
.frequency = I2C_SPEED_FAST, /* 400 kHz */
.mclk = STM32_HSE_FREQUENCY, /* see MCO1 configuration */
.attach = adau1961_attach,
.enable = adau1961_enable,
.reset = adau1961_hw_reset,
}
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_adau1961_initialize
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the ADAU1961 device. This function will register the
* driver as /dev/audio/pcm[x] where x is determined by the minor device
* number.
*
* Input Parameters:
* minor - The input device minor number
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_adau1961_initialize(int minor)
{
FAR struct audio_lowerhalf_s *adau1961;
FAR struct i2c_master_s *i2c;
FAR struct i2s_dev_s *i2s;
static bool initialized = false;
char devname[12];
int ret;
audinfo("minor %d\n", minor);
DEBUGASSERT(minor >= 0 && minor <= 25);
/* Initialize the CODEC if we have not already done so */
if (!initialized)
{
/* Configure MC01 to drive the master clock of the CODEC at 8MHz */
stm32_configgpio(GPIO_MCO1);
stm32_mco1config(RCC_CFGR_MCO1_HSE, RCC_CFGR_MCO1PRE_NONE);
/* Get an instance of the I2C interface for the CODEC */
i2c = stm32_i2cbus_initialize(ADAU1961_I2C_BUS);
if (!i2c)
{
auderr("stm32_i2cbus_initialize failed\n");
ret = -ENODEV;
goto error;
}
/* Get an instance of the I2S interface for the CODEC data streams */
i2s = stm32_sai_initialize(ADAU1961_SAI_BUS);
if (!i2s)
{
auderr("stm32_sai_initialize failed\n");
ret = -ENODEV;
goto error;
}
/* Now we can use these I2C and I2S interfaces to initialize the
* CODEC which will return an audio interface.
*/
adau1961 = adau1961_initialize(i2c, i2s, &g_adau1961info.lower);
if (!adau1961)
{
auderr("adau1961_initialize failed\n");
ret = -ENODEV;
goto error;
}
/* Create a device name */
snprintf(devname, 12, "pcm%d", minor);
/* Finally, we can register the ADAU1961/I2C/I2S audio device. */
ret = audio_register(devname, adau1961);
if (ret < 0)
{
auderr("failed to register /dev/%s device: %d\n", devname, ret);
goto error;
}
/* Now we are initialized */
initialized = true;
}
return OK;
/* Error exits. Unfortunately there is no mechanism in place now to
* recover resources from most errors on initialization failures.
*/
error:
return ret;
}
#endif /* HAVE_ADAU1961 */
@@ -0,0 +1,79 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include "axoloti.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef OK
# define OK 0
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return stm32_bringup();
#endif
}
@@ -0,0 +1,115 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_boot.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "nvic.h"
#include "itm.h"
#include "stm32.h"
#include "axoloti.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#ifdef CONFIG_SCHED_CRITMONITOR
/* Enable ITM and DWT resources, if not left enabled by debugger. */
modifyreg32(NVIC_DEMCR, 0, NVIC_DEMCR_TRCENA);
/* Make sure the high speed cycle counter is running. It will be started
* automatically only if a debugger is connected.
*/
putreg32(0xc5acce55, ITM_LAR);
modifyreg32(DWT_CTRL, 0, DWT_CTRL_CYCCNTENA_MASK);
#endif
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || \
defined(CONFIG_STM32_SPI3)
stm32_spidev_initialize();
#endif
#if defined(CONFIG_STM32_OTGHS) || defined(CONFIG_STM32_OTGFS)
stm32_usbinitialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization */
stm32_bringup();
}
#endif
@@ -0,0 +1,192 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_bringup.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/fs/fs.h>
#ifdef CONFIG_USBMONITOR
# include <nuttx/usb/usbmonitor.h>
#endif
#include "stm32.h"
#ifdef CONFIG_STM32_OTGHS
# include "stm32_usbhost.h"
#endif
#ifdef CONFIG_INPUT_BUTTONS
# include <nuttx/input/buttons.h>
#endif
#ifdef CONFIG_USERLED
# include <nuttx/leds/userled.h>
#endif
#include "axoloti.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void)
{
#ifdef HAVE_RTC_DRIVER
FAR struct rtc_lowerhalf_s *lower;
#endif
int ret = OK;
#ifdef HAVE_SDRAM
/* Initialize access to the SDRAM device */
ret = stm32_sdram_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "stm32_sdram_initialize failed %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_SDIO
/* Initialize the SDIO block driver */
ret = stm32_sdio_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "stm32_sdio_initialize failed %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_USBHOST
/* Initialize USB host operation. stm32_usbhost_initialize() starts a
* thread will monitor for USB connection and disconnection events.
*/
ret = stm32_usbhost_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "stm32_usbhost_initialize failed %d\n", ret);
return ret;
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start();
if (ret != OK)
{
syslog(LOG_ERR, "usbmonitor_start failed %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_INPUT_BUTTONS
/* Register the BUTTON driver */
ret = btn_lower_initialize("/dev/buttons");
if (ret < 0)
{
syslog(LOG_ERR, "btn_lower_initialize failed %d\n", ret);
}
#endif
#ifdef CONFIG_INPUT_REI2C
/* Register the rei2c driver */
ret = rei2c_initialize("/dev/re0");
if (ret < 0)
{
syslog(LOG_ERR, "rei2c_initialize failed %d\n", ret);
}
#endif
#ifdef CONFIG_USERLED
/* Register the LED driver */
ret = userled_lower_initialize("/dev/userleds");
if (ret < 0)
{
syslog(LOG_ERR, "userled_lower_initialize failed %d\n", ret);
}
#endif
#ifdef HAVE_ADAU1961
/* Configure ADAU1961 audio */
ret = stm32_adau1961_initialize(1);
if (ret != OK)
{
syslog(LOG_ERR, "stm32_adau1961_initialize failed %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, STM32_PROCFS_MOUNTPOINT, "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "failed to mount procfs at %s %d\n",
STM32_PROCFS_MOUNTPOINT, ret);
}
#endif
return ret;
}
@@ -0,0 +1,164 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_buttons.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "axoloti.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each axoloti button. This array is indexed by
* the BUTTON_* definitions in board.h
*/
static const uint32_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_USER,
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs.
* EXTI interrupts are configured for all pins.
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32_configgpio(g_buttons[i]);
}
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A HI value means that the key is pressed. */
bool pressed = stm32_gpioread(g_buttons[i]);
/* Accumulate the set of depressed (not released) keys */
if (pressed)
{
ret |= (1 << i);
}
}
return ret;
}
/****************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is
* a button enumeration value that uniquely identifies a button resource.
* See the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
ret =
stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler, arg);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,324 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_extmem.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32.h"
#include "axoloti.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_STM32_FMC
#warning "FMC is not enabled"
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* Axoloti SDRAM GPIO configuration */
static const uint32_t g_sdram_config[] =
{
/* Data lines */
GPIO_FMC_D0, GPIO_FMC_D1, GPIO_FMC_D2, GPIO_FMC_D3,
GPIO_FMC_D4, GPIO_FMC_D5, GPIO_FMC_D6, GPIO_FMC_D7,
GPIO_FMC_D8, GPIO_FMC_D9, GPIO_FMC_D10, GPIO_FMC_D11,
GPIO_FMC_D12, GPIO_FMC_D13, GPIO_FMC_D14, GPIO_FMC_D15,
/* Address lines */
GPIO_FMC_A0, GPIO_FMC_A1, GPIO_FMC_A2, GPIO_FMC_A3,
GPIO_FMC_A4, GPIO_FMC_A5, GPIO_FMC_A6, GPIO_FMC_A7,
GPIO_FMC_A8, GPIO_FMC_A9, GPIO_FMC_A10, GPIO_FMC_A11,
GPIO_FMC_A12,
/* Control lines */
GPIO_FMC_BA0, /* ba0 */
GPIO_FMC_BA1, /* ba1 */
GPIO_FMC_NBL0, /* ldqm */
GPIO_FMC_NBL1, /* udqm */
GPIO_FMC_SDCLK, /* clk */
GPIO_FMC_SDCKE0_1, /* cke */
GPIO_FMC_SDNWE_2, /* we */
GPIO_FMC_SDNCAS, /* cas */
GPIO_FMC_SDNRAS, /* ras */
GPIO_FMC_SDNE0_1, /* cs0 */
GPIO_FMC_SDNE1_2, /* cs1 */
};
#define NUM_SDRAM_GPIOS (sizeof(g_sdram_config) / sizeof(uint32_t))
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdram_memtest
*
* Description:
* Test the SDRAM.
*
****************************************************************************/
#define RAND_A 22695477
#define RAND_C 1
#define TEST_ITERATIONS 16
int stm32_sdram_memtest(void *base, uint32_t size)
{
volatile int iter;
volatile int i;
/* Linear write with linear congruential generator values */
for (iter = 0; iter < TEST_ITERATIONS; iter++)
{
uint32_t x = iter;
/* Write */
for (i = 0; i < size / 4; i++)
{
x = (RAND_A * x) + RAND_C;
((volatile uint32_t *)base)[i] = x;
}
/* Read/verify */
x = iter;
for (i = 0; i < size / 4; i++)
{
x = (RAND_A * x) + RAND_C;
if (((volatile uint32_t *)base)[i] != x)
{
return -1;
}
}
}
/* Scattered byte write at linear congruential generator addresses */
for (iter = 0; iter < TEST_ITERATIONS; iter++)
{
uint32_t x = iter;
/* Write */
for (i = 0; i < 1024 * 1024; i++)
{
x = (RAND_A * x) + RAND_C;
((volatile uint8_t *)base)[x & (size - 1)] = (uint8_t) i;
}
/* Read/verify */
x = iter;
for (i = 0; i < 1024 * 1024; i++)
{
x = (RAND_A * x) + RAND_C;
if (((volatile uint8_t *)base)[x & (size - 1)] != (uint8_t) i)
{
return -1;
}
}
}
return OK;
}
/****************************************************************************
* Name: stm32_sdram_initialize
*
* Description:
* Called from stm32_bringup to initialize external SDRAM access.
* The Axoloti uses an Alliance Memory AS4C4M16SA SDRAM.
*
****************************************************************************/
int stm32_sdram_initialize(void)
{
uint32_t val;
int i;
/* Configure SDRAM GPIOs */
for (i = 0; i < NUM_SDRAM_GPIOS; i++)
{
stm32_configgpio(g_sdram_config[i]);
}
/* Enable the FMC */
stm32_fmc_enable();
/* Go through the SDRAM initialization steps per the reference manual.
* The sdclk period is set to 2 x hclk. That is: 168 /2 = 84 MHz
* This gives a clock period of about 11.9 ns
*/
/* Step 1:
* Program the memory device features into the FMC_SDCRx register. The
* SDRAM clock frequency, RBURST and RPIPE must be programmed in the
* FMC_SDCR1 register.
*/
val = FMC_SDCR_RPIPE_1 | /* rpipe = 1 hclk */
FMC_SDCR_READBURST | /* read burst enabled */
FMC_SDCR_SDCLK_2X | /* sdclk = 2 hclk */
FMC_SDCR_CAS_LATENCY_2 | /* cas latency = 2 cycles */
FMC_SDCR_NBANKS_4 | /* 4 internal banks */
FMC_SDCR_WIDTH_16 | /* width = 16 bits */
FMC_SDCR_ROWS_12 | /* numrows = 12 */
FMC_SDCR_COLS_8; /* numcols = 8 bits */
stm32_fmc_sdram_set_control(1, val);
/* Step 2:
* Program the memory device timing into the FMC_SDTRx register. The
* TRP and TRC timings must be programmed in the FMC_SDTR1 register.
*/
val = FMC_SDTR_TRCD(2) | /* ras to cas delay 21ns => 2x11.90ns */
FMC_SDTR_TRP(2) | /* row precharge 21ns => 2x11.90ns */
FMC_SDTR_TRC(6) | /* row cycle time 63ns => 6x11.9ns */
FMC_SDTR_TRAS(4) | /* row active time 42ns = >4x11.9ns */
FMC_SDTR_TWR(4) | /* write to precharge 42ns => 4x11.9ns */
FMC_SDTR_TXSR(6) | /* exit self refresh 65ns => 6x11.9ns */
FMC_SDTR_TMRD(2); /* load mode register to active 2 clks */
stm32_fmc_sdram_set_timing(1, val);
/* Step 3:
* Set MODE bits to 001 and configure the Target Bank bits (CTB1
* and/or CTB2) in the FMC_SDCMR register to start delivering the clock
* to the memory (SDCKE is driven high).
*/
val = FMC_SDCMR_BANK_1 | FMC_SDCMR_CMD_CLK_ENABLE;
stm32_fmc_sdram_command(val);
/* Step 4:
* Wait during the prescribed delay period. Typical delay is around 100
* μs (refer to the SDRAM datasheet for the required delay after
* power-up).
*/
nxsig_usleep(1000);
/* Step 5:
* Set MODE bits to 010 and configure the Target Bank bits (CTB1
* and/or CTB2) in the FMC_SDCMR register to issue a “Precharge All”
* command.
*/
val = FMC_SDCMR_BANK_1 | FMC_SDCMR_CMD_PALL;
stm32_fmc_sdram_command(val);
/* Step 6:
* Set MODE bits to 011, and configure the Target Bank bits (CTB1
* and/or CTB2) as well as the number of consecutive Auto-refresh
* commands (NRFS) in the FMC_SDCMR register. Refer to the SDRAM
* datasheet for the number of Auto-refresh commands that should be
* issued. Typical number is 8.
*/
val = FMC_SDCMR_NRFS(5) | FMC_SDCMR_BANK_1 | FMC_SDCMR_CMD_AUTO_REFRESH;
stm32_fmc_sdram_command(val);
/* Step 7:
* Configure the MRD field according to your SDRAM device, set the MODE
* bits to '100', and configure the Target Bank bits (CTB1 and/or CTB2)
* in the FMC_SDCMR register to issue a "Load Mode Register" command in
* order to program the SDRAM. In particular:
* a) The CAS latency must be selected following configured value in
* FMC_SDCR1/2 registers
* b) The Burst Length (BL) of 1 must be selected by configuring the
* M[2:0] bits to 000 in the mode register (refer to the SDRAM
* datasheet). If the Mode Register is not the same for both SDRAM
* banks, this step has to be repeated twice, once for each bank,
* and the Target Bank bits set accordingly.
*/
val = FMC_SDCMR_MDR_BURST_LENGTH_2 |
FMC_SDCMR_MDR_BURST_TYPE_SEQUENTIAL |
FMC_SDCMR_MDR_CAS_LATENCY_2 |
FMC_SDCMR_MDR_MODE_NORMAL |
FMC_SDCMR_MDR_WBL_SINGLE | FMC_SDCMR_BANK_1 | FMC_SDCMR_CMD_LOAD_MODE;
stm32_fmc_sdram_command(val);
/* Step 8:
* Program the refresh rate in the FMC_SDRTR register
* The refresh rate corresponds to the delay between refresh cycles. Its
* value must be adapted to SDRAM devices.
*/
stm32_fmc_sdram_set_refresh_rate(1292); /* (64ms/4096rows) x 84MHz) - 20 */
/* Step 9:
* For mobile SDRAM devices, to program the extended mode register it
* should be done once the SDRAM device is initialized: First, a dummy
* read access should be performed while BA1=1 and BA=0 (refer to SDRAM
* address mapping section for BA[1:0] address mapping) in order to select
* the extended mode register instead of Load mode register and then
* program the needed value.
*/
/* Setting EMRS is optional and we're not bothering ... */
/* Enable memory writes for bank 1 */
stm32_fmc_sdram_write_protect(1, false);
/* Wait for the controller to be ready */
stm32_fmc_sdram_wait();
return OK;
}
@@ -0,0 +1,172 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_sdio.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/sdio.h>
#include <nuttx/mmcsd.h>
#include "stm32.h"
#include "axoloti.h"
#ifdef HAVE_SDIO
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Card detections requires card support and a card detection GPIO */
#define HAVE_NCD 1
#if !defined(HAVE_SDIO) || !defined(GPIO_SDIO_NCD)
#undef HAVE_NCD
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static FAR struct sdio_dev_s *g_sdio_dev;
#ifdef HAVE_NCD
static bool g_sd_inserted = 0xff; /* Impossible value */
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_ncd_interrupt
*
* Description:
* Card detect interrupt handler.
*
****************************************************************************/
#ifdef HAVE_NCD
static int stm32_ncd_interrupt(int irq, FAR void *context, FAR void *arg)
{
bool present;
present = !stm32_gpioread(GPIO_SDIO_NCD);
if (present != g_sd_inserted)
{
sdio_mediachange(g_sdio_dev, present);
g_sd_inserted = present;
}
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_sdio_initialize
*
* Description:
* Initialize SDIO-based MMC/SD card support
*
****************************************************************************/
int stm32_sdio_initialize(void)
{
int ret;
#ifdef HAVE_NCD
bool cd_status;
/* Configure the card detect GPIO */
stm32_configgpio(GPIO_SDIO_NCD);
/* Register an interrupt handler for the card detect pin */
stm32_gpiosetevent(GPIO_SDIO_NCD, true, true, true,
stm32_ncd_interrupt, NULL);
#endif
/* Mount the SDIO-based MMC/SD block driver.
* First, get an instance of the SDIO interface
*/
finfo("Initializing SDIO slot %d\n", SDIO_SLOTNO);
g_sdio_dev = sdio_initialize(SDIO_SLOTNO);
if (!g_sdio_dev)
{
ferr("ERROR: Failed to initialize SDIO slot %d\n", SDIO_SLOTNO);
return -ENODEV;
}
/* Now bind the SDIO interface to the MMC/SD driver */
finfo("Bind SDIO to the MMC/SD driver, minor=%d\n", SDIO_MINOR);
ret = mmcsd_slotinitialize(SDIO_MINOR, g_sdio_dev);
if (ret != OK)
{
ferr("ERROR: Failed to bind SDIO to the MMC/SD driver: %d\n", ret);
return ret;
}
finfo("Successfully bound SDIO to the MMC/SD driver\n");
#ifdef HAVE_NCD
/* Use SD card detect pin to check if a card is g_sd_inserted */
cd_status = !stm32_gpioread(GPIO_SDIO_NCD);
finfo("Card detect : %d\n", cd_status);
sdio_mediachange(g_sdio_dev, cd_status);
#else
/* Assume that the SD card is inserted. What choice do we have? */
sdio_mediachange(g_sdio_dev, true);
#endif
return OK;
}
#endif /* HAVE_SDIO */
@@ -0,0 +1,280 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_usbhost.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "arm_arch.h"
#include "stm32.h"
#include "stm32_otghs.h"
#include "axoloti.h"
#ifdef CONFIG_STM32_OTGHS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
#define HAVE_USB 1
#else
#warning "CONFIG_STM32_OTGHS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
#undef HAVE_USB
#endif
#ifndef CONFIG_AXOLOTI_USBHOST_PRIO
#define CONFIG_AXOLOTI_USBHOST_PRIO 100
#endif
#ifndef CONFIG_AXOLOTI_USBHOST_STACKSIZE
#define CONFIG_AXOLOTI_USBHOST_STACKSIZE 1024
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (; ; )
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the Axoloti board.
*
****************************************************************************/
void stm32_usbinitialize(void)
{
#ifdef CONFIG_STM32_OTGHS
stm32_configgpio(GPIO_OTGHS_PWRON);
stm32_configgpio(GPIO_OTGHS_OVER);
#endif
}
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be provided
* be each platform that implements the STM32 OTG HS host interface
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface. Should
* be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
****************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32_gpiowrite(GPIO_OTGHS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32_gpiowrite(GPIO_OTGHS_PWRON, true);
}
}
#endif
/****************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent condition
* is detected.
*
* Input Parameters:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return stm32_gpiosetevent(GPIO_OTGHS_OVER, true, true, true, handler, arg);
}
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int pid;
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
/* Initialize the HID keyboard class */
ret = usbhost_kbdinit();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID keyboard class\n");
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
/* Initialize the HID mouse class */
ret = usbhost_mouse_init();
if (ret != OK)
{
uerr("ERROR: Failed to register the HID mouse class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32_otghshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
pid =
kthread_create("usbhost", CONFIG_AXOLOTI_USBHOST_PRIO,
CONFIG_AXOLOTI_USBHOST_STACKSIZE,
(main_t) usbhost_waiter, (FAR char *const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
#endif /* CONFIG_STM32_OTGHS */
@@ -0,0 +1,109 @@
/****************************************************************************
* boards/arm/stm32/axoloti/src/stm32_userleds.c
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Jason T. Harris <sirmanlypowers@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32.h"
#include "axoloti.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Data
****************************************************************************/
/* This array maps an LED number to GPIO pin configuration */
static uint32_t g_ledcfg[BOARD_NLEDS] =
{
GPIO_LED1, GPIO_LED2,
};
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
if ((unsigned)led < BOARD_NLEDS)
{
stm32_gpiowrite(g_ledcfg[led], ledon);
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) == 0);
stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) == 0);
}
#endif /* !CONFIG_ARCH_LEDS */
@@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_B_G431B_ESC1
endif # ARCH_BOARD_B_G431B_ESC1
@@ -0,0 +1,20 @@
README
======
The B-G431B-ESC Discovery kit board is based on the STM32G431CB microcontroller,
the L6387 driver and STL180N6F7 power MOSFETs.
UART/USART PINS
---------------
USART2 is accessible through J3 pads and ST LINK Virtual Console:
USART2_TX - PB3
USART2_RX - PB4
Configuration Sub-directories
-------------------------
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables the serial interfaces on USART2.
@@ -0,0 +1,50 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
# CONFIG_NSH_ARGCAT is not set
# CONFIG_NSH_CMDOPT_HEXDUMP is not set
# CONFIG_NSH_CMDPARMS is not set
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g431b-esc1"
CONFIG_ARCH_BOARD_B_G431B_ESC1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G431C=y
CONFIG_ARCH_INTERRUPTSTACK=2048
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=8499
CONFIG_BUILTIN=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=22528
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=14
CONFIG_START_MONTH=10
CONFIG_START_YEAR=2014
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_USART2=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_TESTING_OSTEST=y
CONFIG_TESTING_OSTEST_STACKSIZE=1024
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,187 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_B_G431B_ESC1_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_B_G431B_ESC1_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
#undef STM32_BOARD_XTAL /* Not installed by default */
#define STM32_HSI_FREQUENCY 16000000ul /* 16MHz */
#define STM32_LSI_FREQUENCY 32000 /* 32kHz */
#undef STM32_HSE_FREQUENCY /* Not installed by default */
#undef STM32_LSE_FREQUENCY /* Not available on this board */
/* Main PLL Configuration.
*
* PLL source is HSI = 16MHz
* PLLN = 85, PLLM = 4, PLLP = 10, PLLQ = 2, PLLR = 2
*
* f(VCO Clock) = f(PLL Clock Input) x (PLLN / PLLM)
* f(PLL_P) = f(VCO Clock) / PLLP
* f(PLL_Q) = f(VCO Clock) / PLLQ
* f(PLL_R) = f(VCO Clock) / PLLR
*
* Where:
* 8 <= PLLN <= 127
* 1 <= PLLM <= 16
* PLLP = 2 through 31
* PLLQ = 2, 4, 6, or 8
* PLLR = 2, 4, 6, or 8
*
* Do not exceed 170MHz on f(PLL_P), f(PLL_Q), or f(PLL_R).
* 64MHz <= f(VCO Clock) <= 344MHz.
*
* Given the above:
*
* f(VCO Clock) = HSI x PLLN / PLLM
* = 16MHz x 85 / 4
* = 340MHz
*
* PLLPCLK = f(VCO Clock) / PLLP
* = 340MHz / 10
* = 34MHz
* (May be used for ADC)
*
* PLLQCLK = f(VCO Clock) / PLLQ
* = 340MHz / 2
* = 170MHz
* (May be used for QUADSPI, FDCAN, SAI1, I2S3. If set to
* 48MHz, may be used for USB, RNG.)
*
* PLLRCLK = f(VCO Clock) / PLLR
* = 340MHz / 2
* = 170MHz
* (May be used for SYSCLK and most peripherals.)
*/
#define STM32_PLLCFGR_PLLSRC RCC_PLLCFGR_PLLSRC_HSI
#define STM32_PLLCFGR_PLLCFG (RCC_PLLCFGR_PLLPEN | \
RCC_PLLCFGR_PLLQEN | \
RCC_PLLCFGR_PLLREN)
#define STM32_PLLCFGR_PLLN RCC_PLLCFGR_PLLN(85)
#define STM32_PLLCFGR_PLLM RCC_PLLCFGR_PLLM(4)
#define STM32_PLLCFGR_PLLP RCC_PLLCFGR_PLLPDIV(10)
#define STM32_PLLCFGR_PLLQ RCC_PLLCFGR_PLLQ_2
#define STM32_PLLCFGR_PLLR RCC_PLLCFGR_PLLR_2
#define STM32_VCO_FREQUENCY ((STM32_HSI_FREQUENCY / 4) * 85)
#define STM32_PLLP_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#define STM32_PLLQ_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_PLLR_FREQUENCY (STM32_VCO_FREQUENCY / 2)
/* Use the PLL and set the SYSCLK source to be PLLR (170MHz) */
#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
#define STM32_SYSCLK_FREQUENCY STM32_PLLR_FREQUENCY
/* AHB clock (HCLK) is SYSCLK (170MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK (170MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY
/* APB2 clock (PCLK2) is HCLK (170MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
/* LED definitions **********************************************************/
/* The B-G431B-ESC1 has four user LEDs.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0 /* User LD2 */
#define BOARD_NLEDS 1
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
* the Nucleo G431RB. The following definitions describe how NuttX controls
* the LED:
*
* SYMBOL Meaning LED1 state
* ------------------ ----------------------- ----------
* LED_STARTED NuttX has been started OFF
* LED_HEAPALLOCATE Heap has been allocated OFF
* LED_IRQSENABLED Interrupts enabled OFF
* LED_STACKCREATED Idle stack created ON
* LED_INIRQ In an interrupt No change
* LED_SIGNAL In a signal handler No change
* LED_ASSERTION An assertion failed No change
* LED_PANIC The system has crashed Blinking
* LED_IDLE STM32 is is sleep mode Not used
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 0
#define LED_IRQSENABLED 0
#define LED_STACKCREATED 1
#define LED_INIRQ 2
#define LED_SIGNAL 2
#define LED_ASSERTION 2
#define LED_PANIC 1
/* Button definitions *******************************************************/
/* The B-G431B-ESC supports one buttons controllabe by software:
*
* B1 USER: user button connected to the I/O PC10.
*/
#define BUTTON_USER 0
#define NUM_BUTTONS 1
#define BUTTON_USER_BIT (1 << BUTTON_USER)
/* Alternate function pin selections ****************************************/
/* USART2 (ST LINK Virtual Console and J3 pads) */
#define GPIO_USART2_TX GPIO_USART2_TX_3 /* PB3 */
#define GPIO_USART2_RX GPIO_USART2_RX_3 /* PB4 */
/* Pin Multiplexing Disambiguation ******************************************/
#endif /* __BOARDS_ARM_STM32_B_G431B_ESC1_INCLUDE_BOARD_H */
@@ -0,0 +1,77 @@
############################################################################
# boards/arm/stm32/b-g431b-esc1/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(CONFIG_STM32_DFU),y)
LDSCRIPT = ld.script.dfu
else
LDSCRIPT = ld.script
endif
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
# Windows-native toolchains
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin -funwind-tables
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -funwind-tables
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
# Provide map file needed by the "Memory Allocation" view in Eclipse:
LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections
# Embed absolute path to source file in debug information so that Eclipse
# source level debugging won't get confused. See:
# https://stackoverflow.com/questions/1275476/gcc-gdb-how-to-embed-absolute-path-to-source-file-in-debug-information
CFLAGS += -fdebug-prefix-map=..=$(readlink -f ..)
@@ -0,0 +1,124 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32G431CB has 128 KiB of FLASH beginning at address 0x0800:0000.
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* The STM32G431CB has a total of 32 KiB of SRAM in three separate areas:
*
* 1) 16 KiB SRAM1 mapped at 0x2000:0000 thru 0x2000:3fff.
* 2) 6 KiB SRAM2 mapped at 0x2000:4000 thru 0x2000:57ff.
*
* CCM SRAM (Routine Booster):
*
* 3) 10 KiB CCM SRAM mapped at 0x1000:0000 thru 0x1000:27ff
* but also aliased at at 0x2000:5800 thru 0x2000:7fff to be contiguous
* with the SRAM1 and SRAM2.
*
* Because SRAM1 and SRAM2 are contiguous, they are treated as one region
* by this logic.
*
* CCM SRAM is also contiguous to SRAM1 and SRAM2, however it is excluded
* from this linker script, to keep it reserved for special uses in code.
* REVISIT: Is this the correct way to handle CCM SRAM?
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 22K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : ALIGN(4) {
*(.ARM.extab*)
} > flash
.ARM.exidx : ALIGN(4) {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,38 @@
############################################################################
# boards/arm/stm32/nucleo-g431rb/src/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,68 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/b-g431b-esc1.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_B_G431B_ESC1_SRC_B_G431B_ESC1_H
#define __BOARDS_ARM_STM32_B_G431B_ESC1_SRC_B_G431B_ESC1_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* LED definitions **********************************************************/
/* LED definitions **********************************************************/
/* The B-G431B-ESC board has three LEDs. Two of these are controlled by
* logic on the board and are not available for software control:
*
* LD1 COM: LD1 default status is red. LD1 turns to green to indicate that
* communications are in progress between the PC and the
* ST-LINK/V3.
* LD3 PWR: red LED indicates that the board is powered.
*
* And one can be controlled by software:
*
* User LD2: green LED is a user LED connected to the I/O PC6 of the
* STM32G431RB.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LED in
* any way. The following definition is used to access the LED.
*/
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz| \
GPIO_OUTPUT_CLEAR|GPIO_PORTC|GPIO_PIN6)
#define LED_DRIVER_PATH "/dev/userleds"
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* __BOARDS_ARM_STM32_B_G431B_ESC1_SRC_B_G431B_ESC1_H */
@@ -0,0 +1,91 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <syslog.h>
#include <nuttx/board.h>
#include <nuttx/leds/userled.h>
#include "b-g431b-esc1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#undef HAVE_LEDS
#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
# define HAVE_LEDS 1
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch settings, a pointer
* to configuration data read from a file or serial FLASH, or
* whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
int ret;
#if defined(HAVE_LEDS)
/* Register the LED driver */
ret = userled_lower_initialize(LED_DRIVER_PATH);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
return ret;
}
#endif
UNUSED(ret);
return OK;
}
@@ -0,0 +1,78 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "b-g431b-esc1.h"
#if defined(CONFIG_ARCH_LEDS)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED GPIOs for output */
stm32_configgpio(GPIO_LED1);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
if (led == BOARD_LED1)
{
stm32_gpiowrite(GPIO_LED1, true);
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
if (led == BOARD_LED1)
{
stm32_gpiowrite(GPIO_LED1, false);
}
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,70 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "b-g431b-esc1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_ARCH_LEDS)
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
@@ -0,0 +1,75 @@
/****************************************************************************
* boards/arm/stm32/b-g431b-esc1/src/stm32_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "b-g431b-esc1.h"
#if !defined(CONFIG_ARCH_LEDS)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED GPIOs for output */
stm32_configgpio(GPIO_LED1);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
if (led == BOARD_LED1)
{
stm32_gpiowrite(GPIO_LED1, ledon);
}
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
}
#endif /* !CONFIG_ARCH_LEDS */
@@ -0,0 +1,21 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_B_G474E_DPOW1
#config SOME_CONFIG_INT
# int "Description"
# default 1
# depends on FEATURE_X
#
#config SOME_CONFIG_BOOL
# bool "Description"
# default n if !FEATURE_X
# default y if FEATURE_X
# depends on FEATURE_Y
# ---help---
# Help text goes here.
endif # ARCH_BOARD_B_G474E_DPOW1
@@ -0,0 +1,145 @@
README
======
This is the README file for a port of NuttX to the ST Micro B-G474E-DPOW1
Discovery kit with STM32G474RE MCU. For more information about this board,
see:
https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/b-g474e-dpow1.html
Contents
========
- Status
- Development Environment
- Toolchains
- Debugging
- Hardware
- MCU Clocking
- GPIOs
- Buttons
- LEDs
- RGB Power LED
- Serial Consoles
- FLASH Bootloader Support
- Configurations
Status
======
This port boots NuttX through to a functional NSH prompt.
Development Environment
=======================
Toolchains
----------
An appropriate ARM toolchain is needed, such as the one built with the
customized NuttX buildroot or the ready-made GNU Tools for Arm Embedded
Processors.
Debugging
---------
The board incorporates a STLINK-V3E programmer/debugger accessible via the
Micro-USB Type B connector.
To debug with OpenOCD and arm-nuttx-eabi-gdb:
* Use 'make menuconfig' to set CONFIG_DEBUG_SYMBOLS and CONFIG_DEBUG_NOOPT.
To see debug output, e.g., the "ABCDE" printed in __start(), also set
CONFIG_DEBUG_FEATURES.
* Build NuttX.
* Flash the code using:
$ openocd -f interface/stlink.cfg -f target/stm32g4x.cfg -c init \
-c "reset halt" -c "flash write_image erase nuttx.bin 0x08000000"
* Start GDB with:
$ arm-nuttx-eabi-gdb -tui nuttx
* In GDB:
(gdb) target remote localhost:3333
(gdb) monitor reset halt
(gdb) load
Hardware
========
MCU Clocking
------------
By default, the MCU on this board is clocked from the MCU's internal HSI
clock, and only this option is supported by software at this time.
If software support is added for it, the MCU could be clocked from the
following other sources: a 24 MHz oscillator on X2, MCO from STLINK-V3E, or
external clock from connector CN9, pin 26.
GPIOs
-----
Buttons
-------
The board has 5 user buttons in the form of a 4-direction "joystick" with a
selection button (pressing down on the "joystick").
LEDs
----
The board has 4 user LEDs.
RGB Power LED
-------------
The board has a super bright RGB power LED.
Caution: For eye safety, ensure that the power LED is covered by the
diffuser that comes installed over it.
Serial Consoles
===============
The MCU's USART3 is connected to the on-board STLINK-V3E and exposed to
the PC as a Virtual COM Port over the same Micro-USB Type B connection used
for programming/debugging.
On Debian Linux, this shows up as /dev/ttyACM0. Other operating systems may
differ.
FLASH Bootloader Support
========================
If implementing a FLASH bootloader, turn on Kconfig option CONFIG_STM32_DFU.
This option activates an alternate linker script, scripts/ld.script.dfu,
which causes NuttX to leave a gap at the start of FLASH, leaving that space
for the FLASH bootloader. See scripts/ld.script.dfu for details. It also
causes NuttX to relocate its vector table and possibly make other
adjustments.
One possible bootloader is STmicro's OpenBootloader "middleware" supplied
with STM32CubeG4 version 1.3.0. On the host (PC), it should be possible to
use STmicro's STM32CubeProgrammer or the stm32loader.py script from
https://github.com/jsnyder/stm32loader. That script can be invoked with
parameters such as:
stm32loader.py -p /dev/ttyACM0 -a 0x08006000 -e -w -v -g 0x08006000 nuttx.bin
where the given address (0x08006000 in this case) must match the starting
address in scripts/ld.script.dfu.
Configurations
==============
nsh
---
@@ -0,0 +1,45 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_LEDS is not set
# CONFIG_DISABLE_OS_API is not set
# CONFIG_NSH_DISABLE_PRINTF is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="b-g474e-dpow1"
CONFIG_ARCH_BOARD_B_G474E_DPOW1=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32G474R=y
CONFIG_ARCH_HIPRI_INTERRUPT=y
CONFIG_ARCH_RAMVECTORS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARMV7M_LAZYFPU=y
CONFIG_ARMV7M_LIBM=y
CONFIG_ARMV7M_MEMCPY=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_LIBC_FLOATINGPOINT=y
CONFIG_LIBM=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PRIORITY_INHERITANCE=y
CONFIG_RAM_SIZE=98304
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_USERLED=y
CONFIG_USERLED_LOWER=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,190 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
#undef STM32_BOARD_XTAL /* Not installed by default */
#define STM32_HSI_FREQUENCY 16000000ul /* 16MHz */
#define STM32_LSI_FREQUENCY 32000 /* 32kHz */
#undef STM32_HSE_FREQUENCY /* Not installed by default */
#undef STM32_LSE_FREQUENCY /* Not available on this board */
/* Main PLL Configuration.
*
* PLL source is HSI = 16MHz
* PLLN = 85, PLLM = 4, PLLP = 10, PLLQ = 2, PLLR = 2
*
* f(VCO Clock) = f(PLL Clock Input) x (PLLN / PLLM)
* f(PLL_P) = f(VCO Clock) / PLLP
* f(PLL_Q) = f(VCO Clock) / PLLQ
* f(PLL_R) = f(VCO Clock) / PLLR
*
* Where:
* 8 <= PLLN <= 127
* 1 <= PLLM <= 16
* PLLP = 2 through 31
* PLLQ = 2, 4, 6, or 8
* PLLR = 2, 4, 6, or 8
*
* Do not exceed 170MHz on f(PLL_P), f(PLL_Q), or f(PLL_R).
* 64MHz <= f(VCO Clock) <= 344MHz.
*
* Given the above:
*
* f(VCO Clock) = HSI x PLLN / PLLM
* = 16MHz x 85 / 4
* = 340MHz
*
* PLLPCLK = f(VCO Clock) / PLLP
* = 340MHz / 10
* = 34MHz
* (May be used for ADC)
*
* PLLQCLK = f(VCO Clock) / PLLQ
* = 340MHz / 2
* = 170MHz
* (May be used for QUADSPI, FDCAN, SAI1, I2S3. If set to
* 48MHz, may be used for USB, RNG.)
*
* PLLRCLK = f(VCO Clock) / PLLR
* = 340MHz / 2
* = 170MHz
* (May be used for SYSCLK and most peripherals.)
*/
#define STM32_PLLCFGR_PLLSRC RCC_PLLCFGR_PLLSRC_HSI
#define STM32_PLLCFGR_PLLCFG (RCC_PLLCFGR_PLLPEN | \
RCC_PLLCFGR_PLLQEN | \
RCC_PLLCFGR_PLLREN)
#define STM32_PLLCFGR_PLLN RCC_PLLCFGR_PLLN(85)
#define STM32_PLLCFGR_PLLM RCC_PLLCFGR_PLLM(4)
#define STM32_PLLCFGR_PLLP RCC_PLLCFGR_PLLPDIV(10)
#define STM32_PLLCFGR_PLLQ RCC_PLLCFGR_PLLQ_2
#define STM32_PLLCFGR_PLLR RCC_PLLCFGR_PLLR_2
#define STM32_VCO_FREQUENCY ((STM32_HSI_FREQUENCY / 4) * 85)
#define STM32_PLLP_FREQUENCY (STM32_VCO_FREQUENCY / 10)
#define STM32_PLLQ_FREQUENCY (STM32_VCO_FREQUENCY / 2)
#define STM32_PLLR_FREQUENCY (STM32_VCO_FREQUENCY / 2)
/* Use the PLL and set the SYSCLK source to be PLLR (170MHz) */
#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
#define STM32_SYSCLK_FREQUENCY STM32_PLLR_FREQUENCY
/* AHB clock (HCLK) is SYSCLK (170MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK (170MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
#define STM32_PCLK1_FREQUENCY STM32_HCLK_FREQUENCY
/* APB2 clock (PCLK2) is HCLK (170MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
/* LED definitions **********************************************************/
/* The B-G474E-DPOW1 Discovery kit has four user LEDs.
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0 /* User LD2 (Blue) */
#define BOARD_LED2 1 /* User LD3 (Orange) */
#define BOARD_LED3 2 /* User LD4 (Green) */
#define BOARD_LED4 3 /* User LD5 (Red)*/
#define BOARD_NLEDS 4
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 user LEDs
* on the board. The following definitions describe how NuttX controls the
* LEDs:
*
* |--------------------|-------------------------|------------|
* | SYMBOL | Meaning | LED states |
* |--------------------|-------------------------|------------|
* | LED_STARTED | NuttX has been started | 0 0 0 0 |
* | LED_HEAPALLOCATE | Heap has been allocated | 0 0 0 0 |
* | LED_IRQSENABLED | Interrupts enabled | 0 0 0 0 |
* | LED_STACKCREATED | Idle stack created | 1 0 0 0 |
* | LED_INIRQ | In an interrupt | No change |
* | LED_SIGNAL | In a signal handler | No change |
* | LED_ASSERTION | An assertion failed | No change |
* | LED_PANIC | The system has crashed | 0 B 0 0 |
* | LED_IDLE | STM32 is is sleep mode | Not used |
* |--------------------|-------------------------|------------|
*
* LED states legend:
* 0 = off
* 1 = on
* B = blink
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 0
#define LED_IRQSENABLED 0
#define LED_STACKCREATED 1
#define LED_INIRQ 2
#define LED_SIGNAL 2
#define LED_ASSERTION 2
#define LED_PANIC 3
/* Button definitions *******************************************************/
/* Alternate function pin selections ****************************************/
/* USART3 (ST LINK V3E Virtual Console) */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PC10 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PC11 */
/* Pin Multiplexing Disambiguation ******************************************/
#endif /* __BOARDS_ARM_STM32_B_G474E_DPOW1_INCLUDE_BOARD_H */
@@ -0,0 +1,77 @@
############################################################################
# boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
ifeq ($(CONFIG_STM32_DFU),y)
LDSCRIPT = ld.script.dfu
else
LDSCRIPT = ld.script
endif
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
# Windows-native toolchains
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
# Linux/Cygwin-native toolchain
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin -funwind-tables
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -funwind-tables
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -ffunction-sections -fdata-sections -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-pcrel.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
# Provide map file needed by the "Memory Allocation" view in Eclipse:
LDFLAGS += -Map=$(TOPDIR)/NuttX.map --gc-sections
# Embed absolute path to source file in debug information so that Eclipse
# source level debugging won't get confused. See:
# https://stackoverflow.com/questions/1275476/gcc-gdb-how-to-embed-absolute-path-to-source-file-in-debug-information
CFLAGS += -fdebug-prefix-map=..=$(readlink -f ..)
@@ -0,0 +1,124 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32G474RE has 512 KiB of FLASH beginning at address 0x0800:0000.
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* The STM32G474RE has a total of 128 KiB of SRAM in three separate areas:
*
* 1) 80 KiB SRAM1 mapped at 0x2000:0000 thru 0x2001:3fff.
* 2) 16 KiB SRAM2 mapped at 0x2001:4000 thru 0x2001:7fff.
*
* CCM SRAM (Routine Booster):
*
* 3) 32 KiB CCM SRAM mapped at 0x1000:0000 thru 0x1000:7fff
* but also aliased at at 0x2001:8000 thru 0x2001:ffff to be contiguous
* with the SRAM1 and SRAM2.
*
* Because SRAM1 and SRAM2 are contiguous, they are treated as one region
* by this logic.
*
* CCM SRAM is also contiguous to SRAM1 and SRAM2, however it is excluded
* from this linker script, to keep it reserved for special uses in code.
* REVISIT: Is this the correct way to handle CCM SRAM?
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 512K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : ALIGN(4) {
*(.ARM.extab*)
} > flash
.ARM.exidx : ALIGN(4) {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,127 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32G474RE has 512 KiB of FLASH beginning at address 0x0800:0000.
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range. The FLASH bootloader is located there and
* allocated up to 24KiB (6 pages of 4k if single bank mode or 12 pages of 2k
* if dual bank mode), so our executable will begin at 0x0800:6000, leaving
* 488KiB.
*
* The STM32G474RE has a total of 128 KiB of SRAM in three separate areas:
*
* 1) 80 KiB SRAM1 mapped at 0x2000:0000 thru 0x2001:3fff.
* 2) 16 KiB SRAM2 mapped at 0x2001:4000 thru 0x2001:7fff.
*
* CCM SRAM (Routine Booster):
*
* 3) 32 KiB CCM SRAM mapped at 0x1000:0000 thru 0x1000:7fff
* but also aliased at at 0x2001:8000 thru 0x2001:ffff to be contiguous
* with the SRAM1 and SRAM2.
*
* Because SRAM1 and SRAM2 are contiguous, they are treated as one region
* by this logic.
*
* CCM SRAM is also contiguous to SRAM1 and SRAM2, however it is excluded
* from this linker script, to keep it reserved for special uses in code.
* REVISIT: Is this the correct way to handle CCM SRAM?
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08006000, LENGTH = 488K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : ALIGN(4) {
*(.ARM.extab*)
} > flash
.ARM.exidx : ALIGN(4) {
__exidx_start = ABSOLUTE(.);
*(.ARM.exidx*)
__exidx_end = ABSOLUTE(.);
} > flash
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,38 @@
############################################################################
# boards/arm/stm32/b-g474e-dpow1/src/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
ASRCS =
CSRCS = stm32_boot.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,77 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/b-g474e-dpow1.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_B_G474E_DPOW1_SRC_B_G474E_DPOW1_H
#define __BOARDS_ARM_STM32_B_G474E_DPOW1_SRC_B_G474E_DPOW1_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* LED definitions **********************************************************/
/* The B-G474E-DPOW1 Discovery kit has four user LEDs:
*
* | Symbol | PCB | Color |
* |------------|-----|--------|
* | BOARD_LED1 | LD2 | Blue |
* | BOARD_LED2 | LD3 | Orange |
* | BOARD_LED3 | LD4 | Green |
* | BOARD_LED4 | LD5 | Red |
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LED.
*
* Pin assignments follow:
*/
#define GPIO_LED1 (GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_SPEED_5MHz | \
GPIO_OUTPUT_CLEAR | \
GPIO_PORTA | GPIO_PIN15)
#define GPIO_LED2 (GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_SPEED_5MHz | \
GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN1)
#define GPIO_LED3 (GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_SPEED_5MHz | \
GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN7)
#define GPIO_LED4 (GPIO_OUTPUT | GPIO_PUSHPULL | \
GPIO_SPEED_5MHz | \
GPIO_OUTPUT_CLEAR | \
GPIO_PORTB | GPIO_PIN5)
#define LED_DRIVER_PATH "/dev/userleds"
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* __BOARDS_ARM_STM32_B_G474E_DPOW1_SRC_B_G474E_DPOW1_H */
@@ -0,0 +1,91 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <syslog.h>
#include <nuttx/board.h>
#include <nuttx/leds/userled.h>
#include "b-g474e-dpow1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#undef HAVE_LEDS
#if !defined(CONFIG_ARCH_LEDS) && defined(CONFIG_USERLED_LOWER)
# define HAVE_LEDS 1
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch settings, a pointer
* to configuration data read from a file or serial FLASH, or
* whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
int ret;
#if defined(HAVE_LEDS)
/* Register the LED driver */
ret = userled_lower_initialize(LED_DRIVER_PATH);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: userled_lower_initialize() failed: %d\n", ret);
return ret;
}
#endif
UNUSED(ret);
return OK;
}
@@ -0,0 +1,109 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "b-g474e-dpow1.h"
#if defined(CONFIG_ARCH_LEDS)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
switch (led)
{
case BOARD_LED1:
stm32_gpiowrite(GPIO_LED1, true);
break;
case BOARD_LED2:
stm32_gpiowrite(GPIO_LED2, true);
break;
case BOARD_LED3:
stm32_gpiowrite(GPIO_LED3, true);
break;
case BOARD_LED4:
stm32_gpiowrite(GPIO_LED4, true);
break;
}
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
switch (led)
{
case BOARD_LED1:
stm32_gpiowrite(GPIO_LED1, false);
break;
case BOARD_LED2:
stm32_gpiowrite(GPIO_LED2, false);
break;
case BOARD_LED3:
stm32_gpiowrite(GPIO_LED3, false);
break;
case BOARD_LED4:
stm32_gpiowrite(GPIO_LED4, false);
break;
}
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,70 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "b-g474e-dpow1.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_ARCH_LEDS)
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
}
@@ -0,0 +1,122 @@
/****************************************************************************
* boards/arm/stm32/b-g474e-dpow1/src/stm32_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "b-g474e-dpow1.h"
#if !defined(CONFIG_ARCH_LEDS)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
*
* Description:
* Initialize the user LEDs before use. Note: For this function to be
* available to user application logic, CONFIG_ARCH_LEDS must not be
* defined.
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
*
* Description:
* Allow user application logic to control LEDs one at a time. Note: For
* this function to be available to user application logic,
* CONFIG_ARCH_LEDS must not be defined.
*
* Parameters:
* led: Index to the LED, which may be one of the defines BOARD_LED1,
* BOARD_LED2, BOARD_LED3, or BOARD_LED4.
* ledon: true to turn the LED on, false to turn it off.
****************************************************************************/
void board_userled(int led, bool ledon)
{
switch (led)
{
case BOARD_LED1:
stm32_gpiowrite(GPIO_LED1, ledon);
break;
case BOARD_LED2:
stm32_gpiowrite(GPIO_LED2, ledon);
break;
case BOARD_LED3:
stm32_gpiowrite(GPIO_LED3, ledon);
break;
case BOARD_LED4:
stm32_gpiowrite(GPIO_LED4, ledon);
break;
}
}
/****************************************************************************
* Name: board_userled_all
*
* Description:
* Allow user application logic to control all LEDs in one function call.
* Note: For this function to be available to user application logic,
* CONFIG_ARCH_LEDS must not be defined.
*
* Parameters:
* ledset: Bitmask indicating the new state for all LEDs, where a set bit
* indicates LED on and a clear bit indicates LED off. To
* construct the bitmask, using a bitwise OR of the defines
* BOARD_LED1_BIT, BOARD_LED2_BIT, BOARD_LED3_BIT, and/or
* BOARD_LED4_BIT.
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
stm32_gpiowrite(GPIO_LED3, (ledset & BOARD_LED3_BIT) != 0);
stm32_gpiowrite(GPIO_LED4, (ledset & BOARD_LED4_BIT) != 0);
}
#endif /* !CONFIG_ARCH_LEDS */
@@ -0,0 +1,178 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_CLICKER2_STM32
config CLICKER2_STM32_MB1_SPI
bool "mikroBUS1 SPI"
default n
select STM32_SPI3
---help---
Enable SPI support on mikroBUS1 (STM32 SPI3)
config CLICKER2_STM32_MB2_SPI
bool "mikroBUS2 SPI"
default n
select STM32_SPI2
---help---
Enable SPI support on mikroBUS1 (STM32 SPI2)
config CLICKER2_STM32_MB1_BEE
bool "mikroBUS1 MRF24J40 BEE"
default y
depends on IEEE802154_MRF24J40
select CLICKER2_STM32_MB1_SPI
---help---
Enable support for MRF24J40 BEE on mikroBUS1
config CLICKER2_STM32_MB2_BEE
bool "mikroBUS2 MRF24J40 BEE"
default n
depends on IEEE802154_MRF24J40
select CLICKER2_STM32_MB2_SPI
---help---
Enable support for MRF24J40 BEE on mikroBUS2
config CLICKER2_STM32_MRF24J40LH_VERBOSE
bool "Verbose MRF24J40 lowerhalf"
default n
depends on IEEE802154_MRF24J40 && DEBUG_WIRELESS_INFO
---help---
Enable verbose syslog for MRF24J40 lowerhalf
config CLICKER2_STM32_MB1_XBEE
bool "mikroBUS1 XBee radio"
default n
depends on IEEE802154_XBEE
select CLICKER2_STM32_MB1_SPI
---help---
Enable support for XBee radio on mikroBUS1
config CLICKER2_STM32_MB2_XBEE
bool "mikroBUS2 XBee radio"
default n
depends on IEEE802154_XBEE
select CLICKER2_STM32_MB2_SPI
---help---
Enable support for XBee on mikroBUS2
config CLICKER2_STM32_XBEELH_VERBOSE
bool "Verbose XBee lowerhalf"
default n
depends on IEEE802154_XBEE && DEBUG_WIRELESS_INFO
---help---
Enable verbose syslog for XBee lowerhalf
config CLICKER2_STM32_MB1_MMCSD
bool "mikroBUS1 uSD Card Click board"
default n
select CLICKER2_STM32_MB1_SPI
---help---
Enable support for uSD click on mikroBUS1
config CLICKER2_STM32_MB2_MMCSD
bool "mikroBUS2 uSD Card Click board"
default n
select CLICKER2_STM32_MB2_SPI
---help---
Enable support for uSD click on mikroBUS2
if FS_AUTOMOUNTER
if CLICKER2_STM32_MB1_MMCSD
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
bool "MB1 MMCSD automounter"
default n
if CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_FSTYPE
string "MB1 MMCSD file system type"
default "vfat"
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_BLKDEV
string "MB1 MMCSD block device"
default "/dev/mmcsd0"
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_MOUNTPOINT
string "MB1 MMCSD mount point"
default "/mnt/sdcard0"
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_DDELAY
int "MB1 MMCSD debounce delay (milliseconds)"
default 1000
config CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_UDELAY
int "MB1 MMCSD unmount retry delay (milliseconds)"
default 2000
endif # CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
endif # CLICKER2_STM32_MB1_MMCSD
if CLICKER2_STM32_MB2_MMCSD
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
bool "MB2 MMCSD automounter"
default n
if CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_FSTYPE
string "MB2 MMCSD file system type"
default "vfat"
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_BLKDEV
string "MB2 MMCSD block device"
default "/dev/mmcsd0"
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_MOUNTPOINT
string "MB2 MMCSD mount point"
default "/mnt/sdcard0"
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_DDELAY
int "MB2 MMCSD debounce delay (milliseconds)"
default 1000
config CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_UDELAY
int "MB2 MMCSD unmount retry delay (milliseconds)"
default 2000
endif # CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
endif # CLICKER2_STM32_MB2_MMCSD
endif # FS_AUTOMOUNTER
config CLICKER2_STM32_SYSLOG_FILE
bool "Enable file syslog"
default n
depends on SYSLOG_FILE
if CLICKER2_STM32_SYSLOG_FILE
config CLICKER2_STM32_SYSLOG_FILE_PATH
string "Path to syslog file"
default "/mnt/sdcard0/nuttx.log"
config CLICKER2_STM32_SYSLOG_FILE_DELAY
int "Delay time(ms) for syslog file"
default 2500
---help---
If the file used for syslog is on an SD card, the device may need time
to finish mounting the file system. This option selects the amount of
time in milliseconds for the system to wait before attempting to setup
the syslog file
endif # CLICKER2_STM32_SYSLOG_FILE
config CLICKER2_STM32_RNDIS_MACADDR
hex "RNDIS MAC address"
default 0xfadedeadbeef
depends on RNDIS
---help---
If the hardware has no built-in MAC address then the fixed,
software-assigned MAC address MAC address must provided
with this selection.
endif # ARCH_BOARD_CLICKER2_STM32
@@ -0,0 +1,778 @@
README
======
This is the README file for the port of NuttX to the Mikroe Clicker2 STM32
board based on the STMicro STM32F407VGT6 MCU.
Reference: https://shop.mikroe.com/development-boards/starter/clicker-2/stm32f4
Contents
========
o Serial Console
o LEDs
o Buttons
o Using JTAG
o Configurations
Serial Console
==============
The are no RS-232 drivers on-board. An RS-232 Click board is available:
https://shop.mikroe.com/click/interface/rs232 or you can cannot an off-
board TTL-to-RS-232 converter as follows:
USART2: mikroBUS1 PD6/RX and PD5/TX
USART3: mikroBUS2 PD9/RX and PD8TX
GND, 3.3V, and 5V. Are also available
By default, USART3 on mikroBUS2 is used as the serial console in each
configuration unless stated otherwise in the description of the
configuration.
LEDs
====
The Mikroe Clicker2 STM32 has two user controllable LEDs:
LD1/PE12, Active high output illuminates
LD2/PE15, Active high output illuminates
If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
way. If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on
board the Clicker2 for STM32. The following definitions describe how NuttX
controls the LEDs:
SYMBOL Meaning LED state
LD1 LD2
------------------- ----------------------- -------- --------
LED_STARTED NuttX has been started OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF OFF
LED_IRQSENABLED Interrupts enabled OFF OFF
LED_STACKCREATED Idle stack created ON OFF
LED_INIRQ In an interrupt N/C ON
LED_SIGNAL In a signal handler No change
LED_ASSERTION An assertion failed No change
LED_PANIC The system has crashed OFF Blinking
LED_IDLE STM32 is is sleep mode Not used
Thus is LD1 is illuminated, the Clicker2 has completed boot-up. IF LD2
is glowly softly, then interrupts are being taken; the level of illumination
depends amount of time processing interrupts. If LD1 is off and LD2 is
blinking at about 2Hz, then the system has crashed.
Buttons
=======
The Mikroe Clicker2 STM32 has two buttons available to software:
T2/E0, Low sensed when pressed
T3/PA10, Low sensed when pressed
Using JTAG
==========
The Clicker2 comes with the mikroBootloader installed. That bootloader
has not been used and is possibly incompatible with the Clicker2-STM32
linker script at boards/arm/stm32/clicker2-stm32/scripts/flash.ld. Often code must
be built to execute at an offset in to FLASH when a bootloader is used.
Certainly that is the case for the ST-Micro DFU bootloader but I am not
aware of the requirements for use with the mikroBootloader.
JTAG has been used in the development of this board support. The
Clicker2-STM32 board offers a 2x5 JTAG connector. You may use Dupont
jumpers to connect this port to JTAG as described here:
https://www.mikroe.com/how-to-use-st-link-v2-with-clicker-2-for-stm32-a-detailed-walkthrough/
http://www.playembedded.org/blog/en/2016/02/06/mikroe-clicker-2-for-stm32-and-stlink-v2/
NOTE that the FLASH probably has read protection enabled locked. You may
need to follow the instructions at the second link to unlock it. You can
also use the STM32 ST-Link CLI tool on Windows to remove the read protection
using the -OB command:
$ ./ST-LINK_CLI.exe -c SN=53FF6F064966545035320387 SWD LPM
STM32 ST-LINK CLI v2.3.0
STM32 ST-LINK Command Line Interface
ST-LINK SN : 53FF6F064966545035320387
ST-LINK Firmware version : V2J24S4
Connected via SWD.
SWD Frequency = 4000K.
Target voltage = 3.2 V.
Connection mode : Normal.
Debug in Low Power mode enabled.
Device ID:0x413
Device family :STM32F40xx/F41xx
$ ./ST-LINK_CLI.exe -OB RDP=0
STM32 ST-LINK CLI v2.3.0
STM32 ST-LINK Command Line Interface
ST-LINK SN : 53FF6F064966545035320387
ST-LINK Firmware version : V2J24S4
Connected via SWD.
SWD Frequency = 4000K.
Target voltage = 3.2 V.
Connection mode : Normal.
Device ID:0x413
Device family :STM32F40xx/F41xx
Updating option bytes...
Option bytes updated successfully.
NOTE:
1. You can get the ST-Link Utilities here:
http://www.st.com/en/embedded-software/stsw-link004.html
2. The ST-LINK Utility command line interface is located at:
[Install_Directory]\STM32 ST-LINK Utility\ST-LINK Utility\ST-LINK_CLI.exe
3. You can get a summary of all of the command options by running
ST-LINK_CLI.exe with no arguments.
4. You can get the serial number of the ST-Link when from the information
window if you connect via the ST-Link Utility:
11:04:28 : ST-LINK SN : 53FF6F064966545035320387
11:04:28 : ST-LINK Firmware version : V2J24S4
11:04:28 : Connected via SWD.
11:04:28 : SWD Frequency = 100 KHz.
11:04:28 : Connection mode : Normal.
11:04:28 : Debug in Low Power mode enabled.
11:04:30 : Device ID:0x413
11:04:30 : Device family :STM32F40xx/F41xx
11:04:30 : Can not read memory!
Disable Read Out Protection and retry.
You can avoid the mess of jumpers using the mikroProg to ST-Link v2 adapter
along with a 2x5, 10-wire ribbon cable connector:
https://shop.mikroe.com/add-on-boards/adapter/mikroprog-st-link-v2-adapter
Then you can use the ST-Link Utility or other debugger software to write
the NuttX binary to FLASH. OpenOCD can be used with the ST-Link to provide
a debug environment. The debug adaptor is NOT compatible with other JTAG
debuggers such as the Segger J-Link.
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each Clicker2 configuration is maintained in a sub-directory and can be
selected as follow:
tools/configure.sh clicker2-stm32:<subdir>
Before building, make sure the PATH environment variable includes the
correct path to the directory than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
make oldconfig
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
see additional README.txt files in the NuttX tools repository.
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
output on USART3, channel 0) as described above under "Serial
Console". The relevant configuration settings are listed below:
CONFIG_STM32_USART3=y
CONFIG_STM32_USART3_SERIALDRIVER=y
CONFIG_STM32_USART=y
CONFIG_USART3_SERIALDRIVER=y
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_USART3_RXBUFSIZE=256
CONFIG_USART3_TXBUFSIZE=256
CONFIG_USART3_BAUD=115200
CONFIG_USART3_BITS=8
CONFIG_USART3_PARITY=0
CONFIG_USART3_2STOP=0
3. All of these configurations are set up to build under Linux using the
"GNU Tools for ARM Embedded Processors" that is maintained by ARM
(unless stated otherwise in the description of the configuration).
https://developer.arm.com/open-source/gnu-toolchain/gnu-rm
That toolchain selection can easily be reconfigured using
'make menuconfig'. Here are the relevant current settings:
Build Setup:
CONFIG_HOST_LINUX =y : Linux environment
System Type -> Toolchain:
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL=y : GNU ARM EABI toolchain
Configuration sub-directories
-----------------------------
knsh:
This is identical to the nsh configuration below except that NuttX
is built as a protected mode, monolithic module and the user applications
are built separately.
It is recommends to use a special make command; not just 'make' but make
with the following two arguments:
make pass1 pass2
In the normal case (just 'make'), make will attempt to build both user-
and kernel-mode blobs more or less interleaved. This actual works!
However, for me it is very confusing so I prefer the above make command:
Make the user-space binaries first (pass1), then make the kernel-space
binaries (pass2)
NOTES:
1. At the end of the build, there will be several files in the top-level
NuttX build directory:
PASS1:
nuttx_user.elf - The pass1 user-space ELF file
nuttx_user.hex - The pass1 Intel HEX format file (selected in defconfig)
User.map - Symbols in the user-space ELF file
PASS2:
nuttx - The pass2 kernel-space ELF file
nuttx.hex - The pass2 Intel HEX file (selected in defconfig)
System.map - Symbols in the kernel-space ELF file
The J-Link programmer will accept files in .hex, .mot, .srec, and .bin
formats. The St-Link programmer will accept files in hex and .bin
formats.
2. Combining .hex files. If you plan to use the .hex files with your
debugger or FLASH utility, then you may need to combine the two hex
files into a single .hex file. Here is how you can do that.
a. The 'tail' of the nuttx.hex file should look something like this
(with my comments added):
$ tail nuttx.hex
# 00, data records
...
:10 9DC0 00 01000000000800006400020100001F0004
:10 9DD0 00 3B005A0078009700B500D400F300110151
:08 9DE0 00 30014E016D0100008D
# 05, Start Linear Address Record
:04 0000 05 0800 0419 D2
# 01, End Of File record
:00 0000 01 FF
Use an editor such as vi to remove the 05 and 01 records.
b. The 'head' of the nuttx_user.hex file should look something like
this (again with my comments added):
$ head nuttx_user.hex
# 04, Extended Linear Address Record
:02 0000 04 0801 F1
# 00, data records
:10 8000 00 BD89 01084C800108C8110208D01102087E
:10 8010 00 0010 00201C1000201C1000203C16002026
:10 8020 00 4D80 01085D80010869800108ED83010829
...
Nothing needs to be done here. The nuttx_user.hex file should
be fine.
c. Combine the edited nuttx.hex and un-edited nuttx_user.hex
file to produce a single combined hex file:
$ cat nuttx.hex nuttx_user.hex >combined.hex
Then use the combined.hex file with the to write the FLASH image.
If you do this a lot, you will probably want to invest a little time
to develop a tool to automate these steps.
mrf24j40-mac
This is a version of nsh that was used for testing the MRF24J40 MAC be
as a character device. The most important configuration differences are
summarized below:
1. Support for the BEE click and SPI are in enabled in the mikroBUS1 slot:
CONFIG_CLICKER2_STM32_MB1_BEE=y
CONFIG_CLICKER2_STM32_MB1_SPI=y
2. SPI support and STM32 SPI3, in particular, are enabled:
CONFIG_SPI=y
CONFIG_SPI_EXCHANGE=y
CONFIG_STM32_SPI=y
CONFIG_STM32_SPI3=y
4. Support for the IEEE802.15.4 "upper half" character driver is enabled:
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
CONFIG_IEEE802154_MAC_DEV=y
CONFIG_IEEE802154_NTXDESC=3
CONFIG_IEEE802154_IND_PREALLOC=20
CONFIG_IEEE802154_IND_IRQRESERVE=10
CONFIG_IEEE802154_DEFAULT_EADDR=0x00fade00deadbeef
5. Support for the lower half MRF24J40 character driver is enabled
CONFIG_DRIVERS_WIRELESS=y
CONFIG_DRIVERS_IEEE802154=y
CONFIG_IEEE802154_MRF24J40=y
6. Support for the i8sak test program at apps/ieee802154 is enabled:
CONFIG_IEEE802154_LIBMAC=y
CONFIG_IEEE802154_LIBUTILS=y
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_I8SAK_PRIORITY=100
CONFIG_IEEE802154_I8SAK_STACKSIZE=2048
7. Initialization hooks are provided to enable the MRF24J40 and to
register the radio character driver.
CONFIG_NSH_ARCHINIT=y
8. Configuration instructions: WPAN configuration must be performed
using the i8sak program. Detailed instructions are provided in a
README.txt file at apps/wireless/ieee802154/i8sak. You should make
sure that you are familiar with the content of that README.txt file.
Here is a quick "cheat sheet" for associated to setting up a
coordinator and associating with the WPAN:
1. Configure the Coordinator. On coordinator device do:
nsh> i8 /dev/ieee0 startpan cd:ab
nsh> i8 acceptassoc
2. Associate an endpoint device with the WPAN. On the endpoint
device:
nsh> i8 /dev/ieee0 assoc
mrf24j40-6lowpan
This is another version of nsh that is very similar to the mrf24j40-mac
configuration but is focused on testing the IEEE 802.15.4 MAC
integration with the 6LoWPAN network stack. It derives directly from the
mrf24j40-mac and all NOTES provided there apply. Additional differences
are summarized below:
NOTES:
1. You must have two clicker2-stm32 boards each with an MRF24J40 click
board in order to run these tests.
2. This configuration differs from the mrf24j40-mac configuration in
that this configuration, like the usbnsh configuration, uses a USB
serial device for console I/O. Such a configuration is useful on the
Clicker2 STM32 which has no builtin RS-232 drivers and eliminates the
tangle of cables and jumpers needed to debug multi-board setups.
Most other NOTES for the usbnsh configuration should apply. Specific
differences between the usbnsh or mrf24j40-mac configurations and this
configuration are listed in these NOTES.
3. On most serial terminal programs that I have used, the USB
connection will be lost when the target board is reset. When that
happens, you may have to reset your serial terminal program to adapt
to the new USB connection. Using TeraTerm, I actually have to exit
the serial program and restart it in order to detect and select the
re-established USB serial connection.
4. This configuration does NOT have USART3 output enabled. This
configuration supports logging of debug output to a circular
buffer in RAM. This feature is discussed fully in this Wiki page:
https://cwiki.apache.org/confluence/display/NUTTX/SYSLOG . Relevant
configuration settings are summarized below:
Device Drivers:
CONFIG_RAMLOG=y : Enable the RAM-based logging feature.
CONFIG_RAMLOG_SYSLOG=y : This enables the RAM-based logger as the
system logger.
CONFIG_RAMLOG_NONBLOCKING=y : Needs to be non-blocking for dmesg
CONFIG_RAMLOG_BUFSIZE=8192 : Buffer size is 8KiB
NOTE: This RAMLOG feature is really only of value if debug output
is enabled. But, by default, no debug output is disabled in this
configuration. Therefore, there is no logic that will add anything
to the RAM buffer. This feature is configured and in place only
to support any future debugging needs that you may have.
If you don't plan on using the debug features, then by all means
disable this feature and save 8KiB of RAM!
NOTE: There is an issue with capturing data in the RAMLOG: If
the system crashes, all of the crash dump information will go into
the RAMLOG and you will be unable to access it! You can tell that
the system has crashed because (a) it will be unresponsive and (b)
the LD2 will be blinking at about 2Hz.
5. IPv6 networking is enabled with TCP/IP, UDP, 6LoWPAN, and NSH
Telnet support.
6. Configuration instructions: Basic PAN configuration is similar to the
mrf24j40-mac configuration with the exception that you use the network
interface name 'wpan0'. This tells the i8sak app to use a socket
instead of a character device to perform the IOCTL operations with the
MAC. Additionally, after the PAN has been configured with the i8sak
utility, you must explicitly bring the network up on each node:
nsh> ifup wpan0
7. examples/udp is enabled. This will allow two MRF24J40 nodes to
exchange UDP packets. Basic instructions:
On the server node:
nsh> ifconfig
nsh> udpserver &
The ifconfig command will show the IP address of the server. Then on
the client node use this IP address to start the client:
nsh> udpclient <server-ip> &
Where <server-ip> is the IP address of the server that you got above.
NOTE: There is no way to stop the UDP test once it has been started
other than by resetting the board.
Cheat Sheet. Here is a concise summary of all all the steps needed to
run the UDP test (C=Coordinator; E=Endpoint):
C: nsh> i8 wpan0 startpan cd:ab
C: nsh> i8 acceptassoc
E: nsh> i8 wpan0 assoc
C: nsh> ifup wpan0
C: nsh> ifconfig <-- To get the <server-ip>
E: nsh> ifup wpan0
C: nsh> udpserver &
E: nsh> udpclient <server-ip> &
The nsh> dmesg command can be use at any time on any node to see
any debug output that you have selected.
8. examples/nettest is enabled. This will allow two MRF24J40 nodes to
exchange TCP packets. Basic instructions:
On the server node:
nsh> ifconfig
nsh> tcpserver &
The ifconfig command will show the IP address of the server. Then on
the client node use this IP address to start the client:
nsh> tcpclient <server-ip> &
Where <server-ip> is the IP address of the server that you got above.
NOTE: Unlike the UDP test, there the TCP test will terminate
automatically when the packet exchange is complete.
Cheat Sheet. Here is a concise summary of all all the steps needed to
run the TCP test (C=Coordinator; E=Endpoint):
C: nsh> i8 wpan0 startpan cd:ab
C: nsh> i8 acceptassoc
E: nsh> i8 wpan0 assoc
C: nsh> ifup wpan0
C: nsh> ifconfig <-- To get the <server-ip>
E: nsh> ifup wpan0
C: nsh> tcpserver &
E: nsh> tcpclient <server-ip> &
The nsh> dmesg command can be use at any time on any node to see
any debug output that you have selected.
9. The NSH Telnet daemon (server) is enabled. However, it cannot be
started automatically. Rather, it must be started AFTER the network
has been brought up using the NSH 'telnetd' command. You would want
to start the Telent daemon only if you want the node to serve Telent
connections to an NSH shell on the node.
nsh> ifconfig
nsh> telnetd
Note the 'ifconfig' is executed to get the IP address of the node.
This is necessary because the IP address is assigned by the the
Coordinator and may not be known a priori.
10. This configuration also includes the Telnet client program. This
will allow you to execute a NSH one a node from the command line on
a different node. Like:
nsh> telnet <server-ip>
Where <server-ip> is the IP address of the server that you got for
the ifconfig comma on the remote node. Once the telnet session
has been started, you can end the session with:
nsh> exit
Cheat Sheet. Here is a concise summary of all all the steps needed to
run the TCP test (C=Coordinator; E=Endpoint):
C: nsh> i8 wpan0 startpan
C: nsh> i8 acceptassoc
E: nsh> i8 wpan0 assoc
C: nsh> ifup wpan0
C: nsh> ifconfig <-- To get the <server-ip>
E: nsh> ifup wpan0
C: nsh> telnetd <-- Starts the Telnet daemon
E: nsh> telnet <server-ip> <-- Runs the Telnet client
STATUS:
2017-06-21: Basic UDP functionality has been achieved with HC06
compression and short address. Additional testing is required for
other configurations (see text matrix below).
2017-06-23: Added test for TCP functionality. As of yet unverified.
2017-06-24: There are significant problems with the 6LoWPAN TCP send
logic. A major redesign was done to better handle ACKs and
retransmissions, and to work with TCP dynamic windowing.
2017-05-25: After some rather extensive debug, the TCP test was made
to with (HC06 and short addressing).
2017-06-26: Verified with HC06 and extended addressing and HC1 with
both addressing modes.
2017-06-27: Added the Telnet client application to the configuration.
Initial testing reveal a problem that required re-design of the
Telnet daemon: It did not yet support IPv6! But after adding this
support, Telnet worked just fine.
Test Matrix:
The following configurations have been tested:
TEST DATE
COMPRESSION ADDRESSING UDP TCP
----------- ---------- ---- ----
hc06 short 6/21 6/25
extended 6/22 6/26
hc1 short 6/23 6/26
extended 6/23 6/26
ipv6 short --- ---
extended --- ---
telnet short N/A 6/27 (hc06)
extended N/A ---
Other configuration options have not been specifically addressed
(such non-compressable ports, non-MAC based IPv6 addresses, etc.)
One limitation of this test is that it only tests NuttX 6LoWPAN
against NuttX 6LoWPAN. It does not prove that NuttX 6LoWPAN is
compatible with other implementations of 6LoWPAN. The tests could
potentially be verifying only that the design is implemented
incorrectly in compatible way on both the client and server sides.
mrf24j40-starhub and mrf24j40-starpoint
These two configurations implement hub and and star endpoint in a
star topology. Both configurations derive from the mrf24j40-6lowpan
configuration and most of the notes there apply here as well.
1. You must have three clicker2-stm32 boards each with an MRF24J40
click board in order to run these tests: One that serves as the
star hub and at least two star endpoints.
2. The star point configuration differs from the primarily in the
mrf24j40-6lowpan in following is also set:
CONFIG_NET_STAR=y
CONFIG_NET_STARPOINT=y
The CONFIG_NET_STARPOINT selection informs the endpoint that it
must send all frames to the hub of the star, rather than directly
to the recipient.
The star hub configuration, on the other hand, differs from the
mrf24j40-6lowpan in these fundamental ways:
CONFIG_NET_STAR=y
CONFIG_NET_STARHUB=y
CONFIG_NET_IPFORWARD=y
The CONFIG_NET_IPFORWARD selection informs the hub that if it
receives any packets that are not destined for the hub, it should
forward those packets appropriately.
3. Telnet: The star point configuration supports the Telnet daemon,
but not the Telnet client; the star hub configuration supports
the Telnet client, but not the Telnet daemon. Therefore, the
star hub can Telnet to any point in the star, the star endpoints
cannot initiate telnet sessions.
4. TCP and UDP Tests: The same TCP and UDP tests as described for
the mrf24j40-6lowpan coniguration are supported on the star
endpoints, but NOT on the star hub. Therefore, all network testing
is between endpoints with the hub acting, well, only like a hub.
The modified usage of the TCP test is show below with E1 E2
representing the two star endpoints and C: representing the
coordinator/hub.
C: nsh> i8 wpan0 startpan cd:ab
C: nsh> i8 acceptassoc
E1: nsh> i8 wpan0 assoc
E2: nsh> i8 wpan0 assoc
C: nsh> ifup wpan0
E1: nsh> ifup wpan0
E1: nsh> ifconfig <-- To get the IP address of E1 endpoint
E1: nsh> telnetd <-- Starts the Telnet daemon
E2: nsh> ifup wpan0
E2: nsh> ifconfig <-- To get the IP address of E2 endpoint
E2: nsh> telnetd <-- Starts the Telnet daemon
E1: nsh> tcpserver &
E2: nsh> tcpclient <server-ip> &
Where <server-ip> is the IP address of the E1 endpoint.
Similarly for the UDP test:
E1: nsh> udpserver &
E2: nsh> udpclient <server-ip> &
The nsh> dmesg command can be use at any time on any node to see
any debug output that you have selected.
Telenet sessions may be initiated only from the hub to a star
endpoint:
C: nsh> telnet <server-ip> <-- Runs the Telnet client
Where <server-ip> is the IP address of either the E1 or E2 endpoints.
STATUS:
2017-06-29: Configurations added. Initial testing indicates that
the TCP Telnet client can successfully establish sessions with
the two star endpoints. When testing communications between the
two star endpoints via the hub, the frames are correctly directed
to the hub. However, they are not being forwarded to the other
endpoint.
2017-06-30: The failure to forward is understood: When the star
endpoint sent the IPv6 destination address, the HC06 compression
logic elided the address -- meaning that it could be reconstructed
based on the receiver's assigned short address. However, when
intercepted by the hub, the uncompressed address does not know
the short address of the recipient and instead uses the short
address of the hub. This means two things: (1) it looks like
the hub address is the destination address, and (2) the
uncompressed UDP packet has a bad checksum.
This required a change to assure that the destination IPv6 address
is not elided in the case of the star endpoint configuration. After
some additional fixes for byte ordering in 16-bit and 64-bit
compressed IPv6 addresses, then all tests are working as expected:
TCP, UDP, Telnet.
2017-08-05: It looks like I have lost one of my Clicker2-STM32 boards.
This means that I will not be able to do any regression testing as
changes are made to the radio interfaces and 6LoWPAN :(
2017-08-26: There was only a single buffer for reassemblying larger
packets. This could be a problem issue for the hub configuration
which really needs the capability concurrently reassemble multiple
incoming streams. The design was extended to support multiple
reassembly buffers but have not yet been verified on this platform.
nsh:
Configures the NuttShell (nsh) located at examples/nsh. This
configuration is focused on low level, command-line driver testing. It
has no network.
NOTES:
1. Support for NSH built-in applications is provided:
Binary Formats:
CONFIG_BUILTIN=y : Enable support for built-in programs
Application Configuration:
CONFIG_NSH_BUILTIN_APPS=y : Enable starting apps from NSH command line
No built applications are enabled in the base configuration, however.
2. C++ support for applications is enabled:
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
usbnsh:
This is another NSH example. If differs from other 'nsh' configurations
in that this configurations uses a USB serial device for console I/O.
Such a configuration is useful on the Clicker2 STM32 which has no
builtin RS-232 drivers.
NOTES:
1. One most serial terminal programs that I have used, the USB
connection will be lost when the target board is reset. When that
happens, you may have to reset your serial terminal program to adapt
to the new USB connection. Using TeraTerm, I actually have to exit
the serial program and restart it in order to detect and select the
re-established USB serial connection.
2. This configuration does have USART3 output enabled and set up as
the system logging device:
CONFIG_SYSLOG_CHAR=y : Use a character device for system logging
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0" : USART3 will be /dev/ttyS0
However, there is nothing to generate SYSLOG output in the default
configuration so nothing should appear on USART3 unless you enable
some debug output or enable the USB monitor.
3. Enabling USB monitor SYSLOG output. If tracing is enabled, the USB
device will save encoded trace output in in-memory buffer; if the
USB monitor is enabled, that trace buffer will be periodically
emptied and dumped to the system logging device (USART3 in this
configuration):
CONFIG_USBDEV_TRACE=y : Enable USB trace feature
CONFIG_USBDEV_TRACE_NRECORDS=128 : Buffer 128 records in memory
CONFIG_NSH_USBDEV_TRACE=n : No builtin tracing from NSH
CONFIG_NSH_ARCHINIT=y : Automatically start the USB monitor
CONFIG_USBMONITOR=y : Enable the USB monitor daemon
CONFIG_USBMONITOR_STACKSIZE=2048 : USB monitor daemon stack size
CONFIG_USBMONITOR_PRIORITY=50 : USB monitor daemon priority
CONFIG_USBMONITOR_INTERVAL=2 : Dump trace data every 2 seconds
CONFIG_USBMONITOR_TRACEINIT=y : Enable TRACE output
CONFIG_USBMONITOR_TRACECLASS=y
CONFIG_USBMONITOR_TRACETRANSFERS=y
CONFIG_USBMONITOR_TRACECONTROLLER=y
CONFIG_USBMONITOR_TRACEINTERRUPTS=y
Using the Prolifics PL2303 Emulation
------------------------------------
You could also use the non-standard PL2303 serial device instead of
the standard CDC/ACM serial device by changing:
CONFIG_CDCACM=n : Disable the CDC/ACM serial device class
CONFIG_CDCACM_CONSOLE=n : The CDC/ACM serial device is NOT the console
CONFIG_PL2303=y : The Prolifics PL2303 emulation is enabled
CONFIG_PL2303_CONSOLE=y : The PL2303 serial device is the console
@@ -0,0 +1,58 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_ARM_MPU=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILD_PROTECTED=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_LIB_BOARDCTL=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_DISABLE_DD=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_MKRD=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_NUTTX_USERSPACE=0x08020000
CONFIG_PASS1_BUILDIR="boards/arm/stm32/clicker2-stm32/kernel"
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=25
CONFIG_START_MONTH=3
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYS_RESERVED=8
CONFIG_TASK_NAME_SIZE=32
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,117 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_DRIVERS_IEEE802154=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_EXAMPLES_NETTEST=y
CONFIG_EXAMPLES_NETTEST_DEVNAME="wpan0"
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_8=0x0800
CONFIG_EXAMPLES_NETTEST_SERVER_PORTNO=61616
CONFIG_EXAMPLES_NETTEST_TARGET2=y
CONFIG_EXAMPLES_UDP=y
CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
CONFIG_EXAMPLES_UDP_DEVNAME="wpan0"
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_8=0x0d00
CONFIG_EXAMPLES_UDP_SERVER_PORTNO=61616
CONFIG_EXAMPLES_UDP_TARGET2=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_MAC=y
CONFIG_IEEE802154_MACDEV=y
CONFIG_IEEE802154_MRF24J40=y
CONFIG_IEEE802154_NETDEV=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_BUFSIZE=128
CONFIG_IOB_NBUFFERS=32
CONFIG_IOB_NCHAINS=16
CONFIG_LIB_HOSTNAME="MRF24J40"
CONFIG_MAC802154_NTXDESC=32
CONFIG_MAX_TASKS=16
CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETDEV_WIRELESS_IOCTL=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_6LOWPAN=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_IPv6=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=8192
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=160
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STANDARD_SERIAL=y
CONFIG_START_YEAR=2013
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TELNET_CLIENT=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
@@ -0,0 +1,64 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DRIVERS_IEEE802154=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IDLETHREAD_STACKSIZE=2048
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_MAC=y
CONFIG_IEEE802154_MACDEV=y
CONFIG_IEEE802154_MRF24J40=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_YEAR=2013
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
@@ -0,0 +1,102 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_DRIVERS_IEEE802154=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_MAC=y
CONFIG_IEEE802154_MACDEV=y
CONFIG_IEEE802154_MRF24J40=y
CONFIG_IEEE802154_NETDEV=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_BUFSIZE=128
CONFIG_IOB_NBUFFERS=32
CONFIG_IOB_NCHAINS=16
CONFIG_LIB_HOSTNAME="MRF24J40"
CONFIG_MAC802154_NTXDESC=32
CONFIG_MAX_TASKS=16
CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETDEV_TELNET=y
CONFIG_NETDEV_WIRELESS_IOCTL=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NET_6LOWPAN=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_IPv6=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STAR=y
CONFIG_NET_STARHUB=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=8192
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=160
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STANDARD_SERIAL=y
CONFIG_START_YEAR=2013
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TELNET_CLIENT=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
@@ -0,0 +1,118 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_DRIVERS_IEEE802154=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_EXAMPLES_NETTEST=y
CONFIG_EXAMPLES_NETTEST_DEVNAME="wpan0"
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_8=0x0800
CONFIG_EXAMPLES_NETTEST_SERVER_PORTNO=61616
CONFIG_EXAMPLES_NETTEST_TARGET2=y
CONFIG_EXAMPLES_UDP=y
CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
CONFIG_EXAMPLES_UDP_DEVNAME="wpan0"
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_8=0x0d00
CONFIG_EXAMPLES_UDP_SERVER_PORTNO=61616
CONFIG_EXAMPLES_UDP_TARGET2=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_MAC=y
CONFIG_IEEE802154_MACDEV=y
CONFIG_IEEE802154_MRF24J40=y
CONFIG_IEEE802154_NETDEV=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_BUFSIZE=128
CONFIG_IOB_NBUFFERS=32
CONFIG_IOB_NCHAINS=16
CONFIG_LIB_HOSTNAME="MRF24J40"
CONFIG_MAC802154_NTXDESC=32
CONFIG_MAX_TASKS=16
CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_STATISTICS=y
CONFIG_NETDEV_WIRELESS_IOCTL=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_6LOWPAN=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_IPv6=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STAR=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=8192
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=160
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STANDARD_SERIAL=y
CONFIG_START_YEAR=2013
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
@@ -0,0 +1,52 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=25
CONFIG_START_MONTH=3
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_PWR=y
CONFIG_STM32_USART3=y
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USART3_SERIAL_CONSOLE=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,67 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_IFUPDOWN=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_START_DAY=25
CONFIG_START_MONTH=3
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_STM32_USART3=y
CONFIG_SYSLOG_CHAR=y
CONFIG_SYSLOG_DEVPATH="/dev/ttyS0"
CONFIG_SYSLOG_INTBUFFER=y
CONFIG_SYSLOG_INTBUFSIZE=396
CONFIG_SYSTEM_NSH=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,113 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DEV_CONSOLE is not set
# CONFIG_NET_ETHERNET is not set
# CONFIG_NET_IPv4 is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="clicker2-stm32"
CONFIG_ARCH_BOARD_CLICKER2_STM32=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F407VG=y
CONFIG_ARCH_IRQBUTTONS=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARDCTL_USBDEVCTRL=y
CONFIG_BOARD_LATE_INITIALIZE=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_CDCACM=y
CONFIG_CDCACM_CONSOLE=y
CONFIG_CDCACM_RXBUFSIZE=256
CONFIG_CDCACM_TXBUFSIZE=256
CONFIG_CLICKER2_STM32_MB1_XBEE=y
CONFIG_DRIVERS_IEEE802154=y
CONFIG_DRIVERS_WIRELESS=y
CONFIG_EXAMPLES_NETTEST=y
CONFIG_EXAMPLES_NETTEST_DEVNAME="wpan0"
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_NETTEST_SERVERIPv6ADDR_8=0x0800
CONFIG_EXAMPLES_NETTEST_SERVER_PORTNO=61616
CONFIG_EXAMPLES_NETTEST_TARGET2=y
CONFIG_EXAMPLES_UDP=y
CONFIG_EXAMPLES_UDP_CLIENT_PORTNO=61617
CONFIG_EXAMPLES_UDP_DEVNAME="wpan0"
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_1=0xfe80
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_6=0x00ff
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_7=0xfe00
CONFIG_EXAMPLES_UDP_SERVERIPv6ADDR_8=0x0d00
CONFIG_EXAMPLES_UDP_SERVER_PORTNO=61616
CONFIG_EXAMPLES_UDP_TARGET2=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_FS_PROCFS=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_IEEE802154_I8SAK=y
CONFIG_IEEE802154_XBEE=y
CONFIG_INTELHEX_BINARY=y
CONFIG_IOB_BUFSIZE=128
CONFIG_IOB_NBUFFERS=32
CONFIG_IOB_NCHAINS=16
CONFIG_LIB_HOSTNAME="XBee"
CONFIG_MAX_TASKS=16
CONFIG_NET=y
CONFIG_NETDEVICES=y
CONFIG_NETDEV_LATEINIT=y
CONFIG_NETDEV_WIRELESS_IOCTL=y
CONFIG_NETINIT_NETLOCAL=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NET_6LOWPAN=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_IPv6=y
CONFIG_NET_SOCKOPTS=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_WRITE_BUFFERS=y
CONFIG_NET_UDP=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_DISABLE_GET=y
CONFIG_NSH_DISABLE_PUT=y
CONFIG_NSH_DISABLE_WGET=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAMLOG=y
CONFIG_RAMLOG_BUFSIZE=8192
CONFIG_RAMLOG_SYSLOG=y
CONFIG_RAM_SIZE=131072
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_HPWORKPRIORITY=192
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_LPWORKPRIORITY=160
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STANDARD_SERIAL=y
CONFIG_START_YEAR=2013
CONFIG_STM32_CCMEXCLUDE=y
CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_STM32_JTAG_SW_ENABLE=y
CONFIG_STM32_OTGFS=y
CONFIG_STM32_PWR=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_TELNET_CLIENT=y
CONFIG_TASK_NAME_SIZE=32
CONFIG_USBDEV=y
CONFIG_USER_ENTRYPOINT="nsh_main"
CONFIG_WIRELESS=y
CONFIG_WIRELESS_IEEE802154=y
@@ -0,0 +1,338 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/include/board.h
*
* Copyright (C) 2017 Verge Inc. All rights reserved.
* Author: Anthony Merlino <anthony@vergeaero.com>
*
* Modified from:
* boards/stm32f4discovery/include/board.h
* Copyright (C) 2012, 2014-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_CLICKER2_STM32_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_CLICKER2_STM32_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
# include <stdbool.h>
#endif
#ifdef __KERNEL__
# include "stm32_rcc.h"
# include "stm32_sdio.h"
# include "stm32.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* The Clicker 2 for STM32 board features a 25Hz crystal and 32.768kHz RTC
* crystal.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
* SYSCLK(Hz) : 168000000 Determined by PLL configuration
* HCLK(Hz) : 168000000 (STM32_RCC_CFGR_HPRE)
* AHB Prescaler : 1 (STM32_RCC_CFGR_HPRE)
* APB1 Prescaler : 4 (STM32_RCC_CFGR_PPRE1)
* APB2 Prescaler : 2 (STM32_RCC_CFGR_PPRE2)
* HSE Frequency(Hz) : 25000000 (STM32_BOARD_XTAL)
* PLLM : 25 (STM32_PLLCFG_PLLM)
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator
* output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for
* USB OTG FS, : Enabled
* SDIO and RNG clock
*/
/* HSI - 16 MHz RC factory-trimmed
* LSI - 32 KHz RC
* HSE - On-board crystal frequency is 25MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 16000000ul
#define STM32_LSI_FREQUENCY 32000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* Main PLL Configuration.
*
* PLL source is HSE
* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
* = (25,000,000 / 25) * 336
* = 336,000,000
* SYSCLK = PLL_VCO / PLLP
* = 336,000,000 / 2 = 168,000,000
* USB OTG FS, SDIO and RNG Clock
* = PLL_VCO / PLLQ
* = 48,000,000
*/
#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(25)
#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(336)
#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_2
#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(7)
#define STM32_SYSCLK_FREQUENCY 168000000ul
/* AHB clock (HCLK) is SYSCLK (168MHz) */
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
/* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/4)
/* Timers driven from APB1 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM12_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM13_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM14_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* Timers driven from APB2 will be twice PCLK2 */
#define STM32_APB2_TIM1_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM9_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM3_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM4_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM5_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM6_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM7_FREQUENCY (STM32_HCLK_FREQUENCY / 2)
#define BOARD_TIM8_FREQUENCY STM32_HCLK_FREQUENCY
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
* in order to avoid RX overrun/TX underrun errors due to delayed responses
* to service FIFOs in interrupt driven mode. These values have not been
* tuned!!!
*
* SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(118+2)=400 KHz
*/
#define SDIO_INIT_CLKDIV (118 << SDIO_CLKCR_CLKDIV_SHIFT)
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_MMCXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* DMA ON: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(1+2)=16 MHz
* DMA OFF: SDIOCLK=48MHz, SDIO_CK=SDIOCLK/(2+2)=12 MHz
*/
#ifdef CONFIG_SDIO_DMA
# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
#else
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions **********************************************************/
/* The Mikroe Clicker2 STM32 has two user controllable LEDs:
*
* LD1 - PE12, Active high output illuminates
* LD2 - PE15, Active high output illuminates
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_NLEDS 2
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on
* board the Clicker2 for STM32.
* The following definitions describe how NuttX controls the LEDs:
*
* SYMBOL Meaning LED state
* LED1 LED2
* ------------------- ----------------------- -------- --------
* LED_STARTED NuttX has been started OFF OFF
* LED_HEAPALLOCATE Heap has been allocated OFF OFF
* LED_IRQSENABLED Interrupts enabled OFF OFF
* LED_STACKCREATED Idle stack created ON OFF
* LED_INIRQ In an interrupt N/C ON
* LED_SIGNAL In a signal handler No change
* LED_ASSERTION An assertion failed No change
* LED_PANIC The system has crashed OFF Blinking
* LED_IDLE STM32 is is sleep mode Not used
*/
#define LED_STARTED 0
#define LED_HEAPALLOCATE 0
#define LED_IRQSENABLED 0
#define LED_STACKCREATED 1
#define LED_INIRQ 2
#define LED_SIGNAL 3
#define LED_ASSERTION 3
#define LED_PANIC 4
/* Button definitions *******************************************************/
/* The Mikroe Clicker2 STM32 has two buttons available to software:
*
* T2 - PE0, Low sensed when pressed
* T3 - PA10, Low sensed when pressed
*/
#define BUTTON_T2 0
#define BUTTON_T3 1
#define NUM_BUTTONS 2
#define BUTTON_T2_BIT (1 << BUTTON_T2)
#define BUTTON_T3_BIT (1 << BUTTON_T3)
/* Alternate function pin selections ****************************************/
/* U[S]ARTs
*
* USART2 - mikroBUS1
* USART3 - mikroBUS2
*
* Assuming RS-232 connverted connected on mikroMB1/12
*/
#define GPIO_USART2_RX GPIO_USART2_RX_2 /* PD6 */
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
/* SPI
*
* SPI2 - mikroBUS2
* SPI3 - mikroBUS1
*/
#define GPIO_SPI2_MISO GPIO_SPI2_MISO_1 /* PC12 */
#define GPIO_SPI2_MOSI GPIO_SPI2_MOSI_1 /* PC11 */
#define GPIO_SPI2_SCK GPIO_SPI2_SCK_2 /* PC10 */
#define GPIO_SPI3_MISO GPIO_SPI3_MISO_2 /* PB15 */
#define GPIO_SPI3_MOSI GPIO_SPI3_MOSI_2 /* PB14 */
#define GPIO_SPI3_SCK GPIO_SPI3_SCK_2 /* PB13 */
/* I2C
*
* I2C2 - mikroBUS2
* I2C3 - mikroBUS1
*/
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1 /* PB10 */
#define GPIO_I2C2_SDA GPIO_I2C2_SDA_1 /* PB11 */
#define GPIO_I2C3_SCL GPIO_I2C3_SCL_1 /* PA8 */
#define GPIO_I2C3_SDA GPIO_I2C3_SDA_1 /* PC9 */
/* Analog
*
* mikroBUS1 ADC: PA2-MB1_AN
* mikroBUS1 ADC: PA3-MB2_AN
*/
/* PWM
*
* mikroBUS1 ADC: PE9-MB1-PWM (TIM1, channel 1)
* mikroBUS1 ADC: PD12-MB2-PWM (TIM4, channel 1)
*/
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */
#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 /* PD12 */
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in the
* future if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDIO_1 = Channel 4, Stream 3
* DMAMAP_SDIO_2 = Channel 4, Stream 6
*/
#define DMAMAP_SDIO DMAMAP_SDIO_1
#endif /* __BOARDS_ARM_STM32_CLICKER2_STM32_INCLUDE_BOARD_H */
@@ -0,0 +1,103 @@
############################################################################
# boards/arm/stm32/clicker2-stm32/kernel/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
# The entry point name (if none is provided in the .config file)
CONFIG_USER_ENTRYPOINT ?= user_start
ENTRYPT = $(patsubst "%",%,$(CONFIG_USER_ENTRYPOINT))
# Get the paths to the libraries and the links script path in format that
# is appropriate for the host OS
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
# Windows-native toolchains
USER_LIBPATHS = ${shell for path in $(USERLIBS); do dir=`dirname $(TOPDIR)$(DELIM)$$path`;echo "-L\"`cygpath -w $$dir`\"";done}
USER_LDSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld}"
USER_LDSCRIPT += -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld}"
USER_HEXFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.hex}"
USER_SRECFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.srec}"
USER_BINFILE += "${shell cygpath -w $(TOPDIR)$(DELIM)nuttx_user.bin}"
else
# Linux/Cygwin-native toolchain
USER_LIBPATHS = $(addprefix -L$(TOPDIR)$(DELIM),$(dir $(USERLIBS)))
USER_LDSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)memory.ld
USER_LDSCRIPT += -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)user-space.ld
USER_HEXFILE += "$(TOPDIR)$(DELIM)nuttx_user.hex"
USER_SRECFILE += "$(TOPDIR)$(DELIM)nuttx_user.srec"
USER_BINFILE += "$(TOPDIR)$(DELIM)nuttx_user.bin"
endif
USER_LDFLAGS = --undefined=$(ENTRYPT) --entry=$(ENTRYPT) $(USER_LDSCRIPT)
USER_LDLIBS = $(patsubst lib%,-l%,$(basename $(notdir $(USERLIBS))))
USER_LIBGCC = "${shell "$(CC)" $(ARCHCPUFLAGS) -print-libgcc-file-name}"
# Source files
CSRCS = stm32_userspace.c
COBJS = $(CSRCS:.c=$(OBJEXT))
OBJS = $(COBJS)
# Targets:
all: $(TOPDIR)$(DELIM)nuttx_user.elf $(TOPDIR)$(DELIM)User.map
.PHONY: nuttx_user.elf depend clean distclean
$(COBJS): %$(OBJEXT): %.c
$(call COMPILE, $<, $@)
# Create the nuttx_user.elf file containing all of the user-mode code
nuttx_user.elf: $(OBJS)
$(Q) $(LD) -o $@ $(USER_LDFLAGS) $(USER_LIBPATHS) $(OBJS) --start-group $(USER_LDLIBS) --end-group $(USER_LIBGCC)
$(TOPDIR)$(DELIM)nuttx_user.elf: nuttx_user.elf
@echo "LD: nuttx_user.elf"
$(Q) cp -a nuttx_user.elf $(TOPDIR)$(DELIM)nuttx_user.elf
ifeq ($(CONFIG_INTELHEX_BINARY),y)
@echo "CP: nuttx_user.hex"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O ihex nuttx_user.elf $(USER_HEXFILE)
endif
ifeq ($(CONFIG_MOTOROLA_SREC),y)
@echo "CP: nuttx_user.srec"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O srec nuttx_user.elf $(USER_SRECFILE)
endif
ifeq ($(CONFIG_RAW_BINARY),y)
@echo "CP: nuttx_user.bin"
$(Q) $(OBJCOPY) $(OBJCOPYARGS) -O binary nuttx_user.elf $(USER_BINFILE)
endif
$(TOPDIR)$(DELIM)User.map: nuttx_user.elf
@echo "MK: User.map"
$(Q) $(NM) nuttx_user.elf >$(TOPDIR)$(DELIM)User.map
$(Q) $(CROSSDEV)size nuttx_user.elf
.depend:
depend: .depend
clean:
$(call DELFILE, nuttx_user.elf)
$(call DELFILE, "$(TOPDIR)$(DELIM)nuttx_user.*")
$(call DELFILE, "$(TOPDIR)$(DELIM)User.map")
$(call CLEAN)
distclean: clean
@@ -0,0 +1,117 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/kernel/stm32_userspace.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdlib.h>
#include <nuttx/arch.h>
#include <nuttx/mm/mm.h>
#include <nuttx/wqueue.h>
#include <nuttx/userspace.h>
#if defined(CONFIG_BUILD_PROTECTED) && !defined(__KERNEL__)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_NUTTX_USERSPACE
# error "CONFIG_NUTTX_USERSPACE not defined"
#endif
#if CONFIG_NUTTX_USERSPACE != 0x08020000
# error "CONFIG_NUTTX_USERSPACE must be 0x08020000 to match memory.ld"
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* These 'addresses' of these values are setup by the linker script. They are
* not actual uint32_t storage locations! They are only used meaningfully in
* the following way:
*
* - The linker script defines, for example, the symbol_sdata.
* - The declaration extern uint32_t _sdata; makes C happy. C will believe
* that the value _sdata is the address of a uint32_t variable _data (it
* is not!).
* - We can recover the linker value then by simply taking the address of
* of _data. like: uint32_t *pdata = &_sdata;
*/
extern uint32_t _stext; /* Start of .text */
extern uint32_t _etext; /* End_1 of .text + .rodata */
extern const uint32_t _eronly; /* End+1 of read only section (.text + .rodata) */
extern uint32_t _sdata; /* Start of .data */
extern uint32_t _edata; /* End+1 of .data */
extern uint32_t _sbss; /* Start of .bss */
extern uint32_t _ebss; /* End+1 of .bss */
/* This is the user space entry point */
int CONFIG_USER_ENTRYPOINT(int argc, char *argv[]);
const struct userspace_s userspace __attribute__ ((section (".userspace"))) =
{
/* General memory map */
.us_entrypoint = (main_t)CONFIG_USER_ENTRYPOINT,
.us_textstart = (uintptr_t)&_stext,
.us_textend = (uintptr_t)&_etext,
.us_datasource = (uintptr_t)&_eronly,
.us_datastart = (uintptr_t)&_sdata,
.us_dataend = (uintptr_t)&_edata,
.us_bssstart = (uintptr_t)&_sbss,
.us_bssend = (uintptr_t)&_ebss,
/* Memory manager heap structure */
.us_heap = &g_mmheap,
/* Task/thread startup routines */
.task_startup = nxtask_startup,
#ifndef CONFIG_DISABLE_PTHREAD
.pthread_startup = pthread_startup,
#endif
/* Signal handler trampoline */
.signal_handler = up_signal_handler,
/* User-space work queue support (declared in include/nuttx/wqueue.h) */
#ifdef CONFIG_LIB_USRWORK
.work_usrstart = work_usrstart,
#endif
};
/****************************************************************************
* Public Functions
****************************************************************************/
#endif /* CONFIG_BUILD_PROTECTED && !__KERNEL__ */
@@ -0,0 +1,79 @@
############################################################################
# boards/arm/stm32/clicker2-stm32/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
LDSCRIPT = flash.ld
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
# enable precise stack overflow tracking
ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
INSTRUMENTATIONDEFINES = -finstrument-functions -ffixed-r10
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) $(INSTRUMENTATIONDEFINES) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) $(INSTRUMENTATIONDEFINES) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
# Loadable module definitions
CMODULEFLAGS = $(CFLAGS) -mlong-calls # --target1-abs
LDMODULEFLAGS = -r -e module_initialize
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
LDMODULEFLAGS += -T "${shell cygpath -w $(TOPDIR)/libs/libc/modlib/gnu-elf.ld}"
else
LDMODULEFLAGS += -T $(TOPDIR)/libs/libc/modlib/gnu-elf.ld
endif
ifneq ($(CROSSDEV),arm-nuttx-elf-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,116 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/scripts/flash.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 192Kb of SRAM. SRAM is split up into three blocks:
*
* 1) 112Kb of SRAM beginning at address 0x2000:0000
* 2) 16Kb of SRAM beginning at address 0x2001:c000
* 3) 64Kb of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 112K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab :
{
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,126 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/scripts/gnu-elf.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
SECTIONS
{
.text 0x00000000 :
{
_stext = . ;
*(.text)
*(.text.*)
*(.gnu.warning)
*(.stub)
*(.glue_7)
*(.glue_7t)
*(.jcr)
/* C++ support: The .init and .fini sections contain specific logic
* to manage static constructors and destructors.
*/
*(.gnu.linkonce.t.*)
*(.init) /* Old ABI */
*(.fini) /* Old ABI */
_etext = . ;
}
.ARM.extab :
{
*(.ARM.extab*)
}
.ARM.exidx :
{
*(.ARM.exidx*)
}
.rodata :
{
_srodata = . ;
*(.rodata)
*(.rodata1)
*(.rodata.*)
*(.gnu.linkonce.r*)
_erodata = . ;
}
.data :
{
_sdata = . ;
*(.data)
*(.data1)
*(.data.*)
*(.gnu.linkonce.d*)
. = ALIGN(4);
_edata = . ;
}
/* C++ support. For each global and static local C++ object,
* GCC creates a small subroutine to construct the object. Pointers
* to these routines (not the routines themselves) are stored as
* simple, linear arrays in the .ctors section of the object file.
* Similarly, pointers to global/static destructor routines are
* stored in .dtors.
*/
.ctors :
{
_sctors = . ;
*(.ctors) /* Old ABI: Unallocated */
*(.init_array) /* New ABI: Allocated */
_edtors = . ;
}
.dtors :
{
_sdtors = . ;
*(.dtors) /* Old ABI: Unallocated */
*(.fini_array) /* New ABI: Allocated */
_edtors = . ;
}
.bss :
{
_sbss = . ;
*(.bss)
*(.bss.*)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.b*)
*(COMMON)
. = ALIGN(4);
_ebss = . ;
}
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,103 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/scripts/kernel-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text :
{
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > kflash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > kflash
.ARM.extab :
{
*(.ARM.extab*)
} > kflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > kflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > ksram AT > kflash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > ksram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,85 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/scripts/memory.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F407VG has 1024Kb of FLASH beginning at address 0x0800:0000 and
* 192Kb of SRAM. SRAM is split up into three blocks:
*
* 1) 112KB of SRAM beginning at address 0x2000:0000
* 2) 16KB of SRAM beginning at address 0x2001:c000
* 3) 64KB of CCM SRAM beginning at address 0x1000:0000
*
* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
* where the code expects to begin execution by jumping to the entry point in
* the 0x0800:0000 address range.
*
* For MPU support, the kernel-mode NuttX section is assumed to be 128Kb of
* FLASH and 4Kb of SRAM. That is an excessive amount for the kernel which
* should fit into 64KB and, of course, can be optimized as needed (See
* also boards/arm/stm32/clicker2-stm32/scripts/kernel-space.ld). Allowing the
* additional does permit addition debug instrumentation to be added to the
* kernel space without overflowing the partition.
*
* Alignment of the user space FLASH partition is also a critical factor:
* The user space FLASH partition will be spanned with a single region of
* size 2**n bytes. The alignment of the user-space region must be the same.
* As a consequence, as the user-space increases in size, the alignment
* requirement also increases.
*
* This alignment requirement means that the largest user space FLASH region
* you can have will be 512KB at it would have to be positioned at
* 0x08800000. If you change this address, don't forget to change the
* CONFIG_NUTTX_USERSPACE configuration setting to match and to modify
* the check in kernel/userspace.c.
*
* For the same reasons, the maximum size of the SRAM mapping is limited to
* 4KB. Both of these alignment limitations could be reduced by using
* multiple regions to map the FLASH/SDRAM range or perhaps with some
* clever use of subregions.
*
* A detailed memory map for the 112KB SRAM region is as follows:
*
* 0x20000 0000: Kernel .data region. Typical size: 0.1KB
* ------- ---- Kernel .bss region. Typical size: 1.8KB
* 0x20000 0800: Kernel IDLE thread stack (approximate). Size is
* determined by CONFIG_IDLETHREAD_STACKSIZE and
* adjustments for alignment. Typical is 1KB.
* ------- ---- Padded to 4KB
* 0x20000 1000: User .data region. Size is variable.
* ------- ---- User .bss region Size is variable.
* 0x20000 2000: Beginning of kernel heap. Size determined by
* CONFIG_MM_KERNEL_HEAPSIZE.
* ------- ---- Beginning of user heap. Can vary with other settings.
* 0x20001 c000: End+1 of CPU RAM
*/
MEMORY
{
/* 1024Kb FLASH */
kflash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
uflash (rx) : ORIGIN = 0x08020000, LENGTH = 128K
xflash (rx) : ORIGIN = 0x08040000, LENGTH = 768K
/* 112Kb of contiguous SRAM */
ksram (rwx) : ORIGIN = 0x20000000, LENGTH = 4K
usram (rwx) : ORIGIN = 0x20001000, LENGTH = 4K
xsram (rwx) : ORIGIN = 0x20002000, LENGTH = 104K
}
@@ -0,0 +1,105 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/scripts/user-space.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* NOTE: This depends on the memory.ld script having been included prior to
* this script.
*/
OUTPUT_ARCH(arm)
SECTIONS
{
.userspace :
{
*(.userspace)
} > uflash
.text :
{
_stext = ABSOLUTE(.);
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > uflash
.init_section :
{
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > uflash
.ARM.extab :
{
*(.ARM.extab*)
} > uflash
__exidx_start = ABSOLUTE(.);
.ARM.exidx :
{
*(.ARM.exidx*)
} > uflash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
.data :
{
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > usram AT > uflash
.bss :
{
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > usram
/* Stabs debugging sections */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,69 @@
############################################################################
# boards/arm/stm32/clicker2-stm32/src/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_bringup.c stm32_spi.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
ifeq ($(CONFIG_IEEE802154_MRF24J40),y)
CSRCS += stm32_mrf24j40.c
endif
ifeq ($(CONFIG_IEEE802154_XBEE),y)
CSRCS += stm32_xbee.c
endif
ifeq ($(CONFIG_MMCSD_SPI),y)
CSRCS += stm32_mmcsd.c
endif
ifeq ($(CONFIG_FS_AUTOMOUNTER),y)
CSRCS += stm32_automount.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
ifeq ($(CONFIG_CAN),y)
CSRCS += stm32_can.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,426 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/clicker2-stm32.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_CLICKER2_STM32_SRC_CLICKER2_H
#define __BOARDS_ARM_STM32_CLICKER2_STM32_SRC_CLICKER2_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Assume that we support everything until convinced otherwise */
#define HAVE_USBDEV 1
#define HAVE_USBMONITOR 1
#define HAVE_MMCSD 1
#define HAVE_AUTOMOUNTER 1
/* MMCSD */
/* Only support uSD click board */
#if !defined(CONFIG_CLICKER2_STM32_MB1_MMCSD) && \
!defined(CONFIG_CLICKER2_STM32_MB2_MMCSD)
# undef HAVE_MMCSD
#endif
/* Can't support MMC/SD features if mountpoints are disabled */
#if defined(HAVE_MMCSD) && defined(CONFIG_DISABLE_MOUNTPOINT)
# warning Mountpoints disabled. No MMC/SD support
# undef HAVE_MMCSD
#endif
#ifdef HAVE_MMCSD
/* Default slot number */
# ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
# ifdef CONFIG_NSH_MMCSDSLOTNO
# define MB1_MMCSD_SLOTNO CONFIG_NSH_MMCSDSLOTNO
# else
# define MB1_MMCSD_SLOTNO 0
# endif
# ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
# define MB2_MMCSD_SLOTNO MB1_MMCSD_SLOTNO+1
# endif
# elif defined(CONFIG_CLICKER2_STM32_MB2_MMCSD)
# ifdef CONFIG_NSH_MMCSDSLOTNO
# define MB2_MMCSD_SLOTNO CONFIG_NSH_MMCSDSLOTNO
# else
# define MB2_MMCSD_SLOTNO 0
# endif
# endif
/* Default minor device number */
# ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
# ifdef CONFIG_NSH_MMCSDMINOR
# define MB1_MMCSD_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define MB1_MMCSD_MINOR 0
# endif
# ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
# define MB2_MMCSD_MINOR MB1_MMCSD_MINOR+1
# endif
# elif defined(CONFIG_CLICKER2_STM32_MB2_MMCSD)
# ifdef CONFIG_NSH_MMCSDMINOR
# define MB2_MMCSD_MINOR CONFIG_NSH_MMCSDMINOR
# else
# define MB2_MMCSD_MINOR 0
# endif
# endif
#endif /* HAVE_MMCSD */
#ifndef CONFIG_FS_AUTOMOUNTER
# undef HAVE_AUTOMOUNTER
#endif
/* Can't support USB device feature if USB OTG FS is not enabled */
#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBDEV)
# undef HAVE_USBDEV
#endif
/* Check if we should enable the USB monitor before starting NSH */
#ifndef CONFIG_USBMONITOR
# undef HAVE_USBMONITOR
#endif
#ifndef HAVE_USBDEV
# undef CONFIG_USBDEV_TRACE
#endif
#ifndef HAVE_USBHOST
# undef CONFIG_USBHOST_TRACE
#endif
#if !defined(CONFIG_USBDEV_TRACE) && !defined(CONFIG_USBHOST_TRACE)
# undef HAVE_USBMONITOR
#endif
/* Mickroe Clicker2 STM32 GPIOs *********************************************/
/* LEDs
*
* The Mikroe Clicker2 STM32 has two user controllable LEDs:
*
* LD1 - PE12, Active high output illuminates
* LD2 - PE15, Active high output illuminates
*/
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN12)
#define GPIO_LED2 (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN15)
/* BUTTONs
*
* The Mikroe Clicker2 STM32 has two buttons available to software:
*
* T2 - PE0, Low sensed when pressed
* T3 - PA10, Low sensed when pressed
*
* NOTE that all have EXTI interrupts configured
*/
#define GPIO_BTN_T2 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN0)
#define GPIO_BTN_T3 (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN10)
/* USB OTG FS
*
* USB device. VBUS sensing is provided:
*
* PA9 OTG_FS_VBUS VBUS sensing (USB-DET)
*
* USB host does not appear to be supported. My interpretation is that power
* is provided via LTC3586 which can be driven either from USB VBUS or from
* PWR-EN (controlled by SW1).
* But I don't see any capability to drive VBUS power.
*
* Overcurrent and battery status are provided by the LTC3586, but not USB
* power.
*
* PC6 Overcurrent detection (PC6-FAULT)
* PD4 Battery status (PD4-BATSTAT)
*/
/* USB device */
/* USB device */
#define GPIO_OTGFS_VBUS (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTA|GPIO_PIN9)
/* Power status */
#define GPIO_PWR_FAULT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTC|GPIO_PIN6)
#define GPIO_PWR_BATSTAT (GPIO_INPUT|GPIO_FLOAT|GPIO_PORTD|GPIO_PIN4)
/* mikroBUS *****************************************************************/
/* U[S]ARTs
*
* USART2 - mikroBUS1
* USART3 - mikroBUS2
*/
/* SPI Chip Selects
*
* mikroBUS1 Chipselect: PE8-MB1_CS (SPI3)
* mikroBUS2 Chipselect: PE11-MB2_CS (SPI2)
*/
#define GPIO_MB1_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN8)
#define GPIO_MB2_CS (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN11)
/* I2C
*
* mikroBUS1 I2C: PA8-I2C3_SCL, PC9-I2C3_SDA (I2C3)
* mikroBUS2 I2C: PB10-I2C2_SCL, PB11-I2C2_SDA ()
*/
/* Analog
*
* mikroBUS1 ADC: PA2-MB1_AN
* mikroBUS1 ADC: PA3-MB2_AN
*/
/* PWM
*
* mikroBUS1 ADC: PE9-MB1-PWM (TIM1, channel 1)
* mikroBUS1 ADC: PD12-MB2-PWM (TIM4, channel 1)
*/
/* Reset
*
* mikroBUS1 Reset: PE7-MB1_RST
* mikroBUS2 Reset: PE13-MB2_RST
*/
#define GPIO_MB1_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN7)
#define GPIO_MB2_RST (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
/* Interrupts
*
* mikroBUS1 Interrupt: PE10-MB1_INT
* mikroBUS2 Interrupt: PE14-MB2_INT
*
* I assume that the interrupt lines are active low.
* No pull-ups are provided on board so pull-ups are provided
* in the pin configurations.
*/
#define GPIO_MB1_INT (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|GPIO_PORTE|GPIO_PIN10)
#define GPIO_MB2_INT (GPIO_INPUT|GPIO_PULLUP|GPIO_EXTI|GPIO_PORTE|GPIO_PIN14)
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2
* STM32 board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void);
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=y && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void);
/****************************************************************************
* Name: stm32_usb_configure
*
* Description:
* Called from stm32_boardinitialize very early in inialization to setup
* USB-related GPIO pins for the Mikroe Clicker2 STM32 board.
*
****************************************************************************/
#ifdef CONFIG_STM32_OTGFS
void stm32_usb_configure(void);
#endif
/****************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
#ifdef CONFIG_ADC
int stm32_adc_setup(void);
#endif
/****************************************************************************
* Name: stm32_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
#ifdef CONFIG_CAN
int stm32_can_setup(void);
#endif
/****************************************************************************
* Name: stm32_mrf24j40_initialize
*
* Description:
* Initialize the MRF24J40 device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#if defined(CONFIG_CLICKER2_STM32_MB1_BEE) || defined(CONFIG_CLICKER2_STM32_MB2_BEE)
int stm32_mrf24j40_initialize(void);
#endif
/****************************************************************************
* Name: stm32_xbee_initialize
*
* Description:
* Initialize the XBee device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#if defined(CONFIG_CLICKER2_STM32_MB1_XBEE) || defined(CONFIG_CLICKER2_STM32_MB2_XBEE)
int stm32_xbee_initialize(void);
#endif
/****************************************************************************
* Name: stm32_mmcsd_initialize
*
* Description:
* Initialize the MMCSD device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef HAVE_MMCSD
int stm32_mmcsd_initialize(void);
#endif
/****************************************************************************
* Name: stm32_cardinserted
*
* Description:
* Check if SD card is inserted in slotno
*
* Returned Value:
* true if card is inserted, false if not
*
****************************************************************************/
#ifdef HAVE_MMCSD
bool stm32_cardinserted(int slotno);
#endif
/****************************************************************************
* Name: stm32_automount_initialize
*
* Description:
* Configure auto-mounters for each enabled MikroBus MMCSD
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef HAVE_AUTOMOUNTER
int stm32_automount_initialize(void);
#endif
/****************************************************************************
* Name: stm32_automount_event
*
* Description:
* The MMCSD card detection logic has detected an insertion or removal
* event. It has already scheduled the MMC/SD block driver operations.
* Now we need to schedule the auto-mount event which will occur with a
* substantial delay to make sure that everything has settle down.
*
* Input Parameters:
* slotno - Identifies the MB slot: MB1_MMCSD_SLOTNO or MB2_MMCSD_SLOTNO.
* inserted - True if the card is inserted in the slot. False otherwise.
*
* Returned Value:
* None
*
* Assumptions:
* Interrupts are disabled.
*
****************************************************************************/
#ifdef HAVE_AUTOMOUNTER
void stm32_automount_event(int slotno, bool inserted);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32_CLICKER2_STM32_SRC_CLICKER2_H */
@@ -0,0 +1,154 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_adc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/analog/adc.h>
#include <arch/board/board.h>
#include "chip.h"
#include "stm32_adc.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_ADC
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32_NADC < 3
# undef CONFIG_STM32_ADC3
#endif
#if STM32_NADC < 2
# undef CONFIG_STM32_ADC2
#endif
#if STM32_NADC < 1
# undef CONFIG_STM32_ADC1
#endif
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
#ifndef CONFIG_STM32_ADC1
# warning "Channel information only available for ADC1"
#endif
/* The number of ADC channels in the conversion list */
#define ADC1_NCHANNELS 1
/****************************************************************************
* Private Data
****************************************************************************/
/* The Olimex STM32-P407 has a 10 Kohm potentiometer AN_TR connected to PC0
* ADC123_IN10
*/
/* Identifying number of each ADC channel: Variable Resistor. */
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
10
};
/* Configurations of pins used byte each ADC channels */
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC1_IN10
};
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
int stm32_adc_setup(void)
{
#ifdef CONFIG_STM32_ADC1
static bool initialized = false;
struct adc_dev_s *adc;
int ret;
int i;
/* Check if we have already initialized */
if (!initialized)
{
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < ADC1_NCHANNELS; i++)
{
stm32_configgpio(g_pinlist[i]);
}
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
if (adc == NULL)
{
aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
#else
return -ENOSYS;
#endif
}
#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
#endif /* CONFIG_ADC */
@@ -0,0 +1,111 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <unistd.h>
#include <syslog.h>
#include <nuttx/board.h>
#include <nuttx/signal.h>
#include <nuttx/syslog/syslog.h>
#include "clicker2-stm32.h"
#ifdef CONFIG_LIB_BOARDCTL
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform application specific initialization. This function is never
* called directly from application code, but only indirectly via the
* (non-standard) boardctl() interface using the command BOARDIOC_INIT.
*
* CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
* CONFIG_BOARD_LATE_INITIALIZE=y, CONFIG_NSH_LIBRARY=y, &&
* CONFIG_LIB_BOARDCTL=n :
* Called from board_late_initialize().
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
int ret;
/* Did we already initialize via board_late_initialize()? */
#ifndef CONFIG_BOARD_LATE_INITIALIZE
ret = stm32_bringup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_bringup() failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_CLICKER2_STM32_SYSLOG_FILE
/* Delay some time for the automounter to finish mounting before
* bringing up file syslog.
*/
nxsig_usleep(CONFIG_CLICKER2_STM32_SYSLOG_FILE_DELAY * 1000);
ret = syslog_file_channel(CONFIG_CLICKER2_STM32_SYSLOG_FILE_PATH);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: syslog_file_channel() failed: %d\n", ret);
return ret;
}
#endif
UNUSED(ret);
return OK;
}
#endif /* CONFIG_LIB_BOARDCTL */
@@ -0,0 +1,187 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_autoleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on
* board the Clicker2 for STM32. The following definitions describe how
* NuttX controls the LEDs:
*
* SYMBOL Meaning LED state
* LED1 LED2
* ------------------- ----------------------- -------- --------
* LED_STARTED NuttX has been started OFF OFF
* LED_HEAPALLOCATE Heap has been allocated OFF OFF
* LED_IRQSENABLED Interrupts enabled OFF OFF
* LED_STACKCREATED Idle stack created ON OFF
* LED_INIRQ In an interrupt N/C ON
* LED_SIGNAL In a signal handler No change
* LED_ASSERTION An assertion failed No change
* LED_PANIC The system has crashed OFF Blinking
* LED_IDLE STM32 is is sleep mode Not used
*
* VALUE
* -------------------------------------------- -------- --------
* 0 OFF OFF
* 1 ON OFF
* 2 N/C ON
* 3 N/C N/C
* 4 OFF ON
*/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Functions
****************************************************************************/
static void board_led1_on(int led)
{
bool ledon = false;
switch (led)
{
case 0: /* LED1=OFF */
case 4: /* LED1=OFF */
break;
case 1: /* LED1=ON */
ledon = true;
break;
case 2: /* LED1=N/C */
case 3: /* LED1=N/C */
default:
return;
}
stm32_gpiowrite(GPIO_LED1, ledon);
}
static void board_led2_on(int led)
{
bool ledon = false;
switch (led)
{
case 0: /* LED2=OFF */
case 1: /* LED2=OFF */
break;
case 2: /* LED2=ON */
case 4: /* LED2=ON */
ledon = true;
break;
case 3: /* LED2=N/C */
default:
return;
}
stm32_gpiowrite(GPIO_LED2, ledon);
}
static void board_led1_off(int led)
{
switch (led)
{
case 0: /* LED1=OFF */
case 1: /* LED1=OFF */
case 4: /* LED1=OFF */
break;
case 2: /* LED1=N/C */
case 3: /* LED1=N/C */
default:
return;
}
stm32_gpiowrite(GPIO_LED1, false);
}
static void board_led2_off(int led)
{
switch (led)
{
case 0: /* LED2=OFF */
case 1: /* LED2=OFF */
case 2: /* LED2=OFF */
case 4: /* LED2=OFF */
break;
case 3: /* LED2=N/C */
default:
return;
}
stm32_gpiowrite(GPIO_LED2, false);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
void board_autoled_initialize(void)
{
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
board_led1_on(led);
board_led2_on(led);
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
board_led1_off(led);
board_led2_off(led);
}
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,398 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_automount.c
*
* Copyright (C) 2017 Verge Inc. All rights reserved.
* Author: Anthony Merlino <anthony@vergeaero.com>
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#if defined(CONFIG_FS_AUTOMOUNTER_DEBUG) && !defined(CONFIG_DEBUG_FS)
# define CONFIG_DEBUG_FS 1
#endif
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/clock.h>
#include <nuttx/fs/automount.h>
#include "clicker2-stm32.h"
#ifdef HAVE_AUTOMOUNTER
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure represents the changeable state of the automounter */
struct stm32_automount_state_s
{
volatile automount_handler_t handler; /* Upper half handler */
FAR void *arg; /* Handler argument */
bool enable; /* Fake interrupt enable */
bool pending; /* Set if there an event while disabled */
};
/* This structure represents the static configuration of an automounter */
struct stm32_automount_config_s
{
/* This must be first thing in structure so that we can simply cast from
* struct automount_lower_s to struct stm32_automount_config_s
*/
struct automount_lower_s lower; /* Publicly visible part */
uint8_t mmcsd; /* MB1_MMCSD_SLOTNO or MB2_MMCSD_SLOTNO */
FAR struct stm32_automount_state_s *state; /* Changeable state */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static int stm32_attach(FAR const struct automount_lower_s *lower,
automount_handler_t isr, FAR void *arg);
static void stm32_enable(FAR const struct automount_lower_s *lower,
bool enable);
static bool stm32_inserted(FAR const struct automount_lower_s *lower);
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
static struct stm32_automount_state_s g_mb1_mmcsdstate;
static const struct stm32_automount_config_s g_mb1_mmcsdconfig =
{
.lower =
{
.fstype = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_FSTYPE,
.blockdev = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_BLKDEV,
.mountpoint = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_MOUNTPOINT,
.ddelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_UDELAY),
.attach = stm32_attach,
.enable = stm32_enable,
.inserted = stm32_inserted
},
.mmcsd = MB1_MMCSD_SLOTNO,
.state = &g_mb1_mmcsdstate
};
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
static struct stm32_automount_state_s g_mb2_mmcsdstate;
static const struct stm32_automount_config_s g_mb2_mmcsdconfig =
{
.lower =
{
.fstype = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_FSTYPE,
.blockdev = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_BLKDEV,
.mountpoint = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_MOUNTPOINT,
.ddelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_UDELAY),
.attach = stm32_attach,
.enable = stm32_enable,
.inserted = stm32_inserted
},
.mmcsd = MB2_MMCSD_SLOTNO,
.state = &g_mb2_mmcsdstate
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_attach
*
* Description:
* Attach a new MMCSD event handler
*
* Input Parameters:
* lower - An instance of the auto-mounter lower half state structure
* isr - The new event handler to be attach
* arg - Client data to be provided when the event handler is invoked.
*
* Returned Value:
* Always returns OK
*
****************************************************************************/
static int stm32_attach(FAR const struct automount_lower_s *lower,
automount_handler_t isr, FAR void *arg)
{
FAR const struct stm32_automount_config_s *config;
FAR struct stm32_automount_state_s *state;
/* Recover references to our structure */
config = (FAR struct stm32_automount_config_s *)lower;
DEBUGASSERT(config && config->state);
state = config->state;
/* Save the new handler info (clearing the handler first to eliminate race
* conditions).
*/
state->handler = NULL;
state->pending = false;
state->arg = arg;
state->handler = isr;
return OK;
}
/****************************************************************************
* Name: stm32_enable
*
* Description:
* Enable card insertion/removal event detection
*
* Input Parameters:
* lower - An instance of the auto-mounter lower half state structure
* enable - True: enable event detection; False: disable
*
* Returned Value:
* None
*
****************************************************************************/
static void stm32_enable(FAR const struct automount_lower_s *lower,
bool enable)
{
FAR const struct stm32_automount_config_s *config;
FAR struct stm32_automount_state_s *state;
irqstate_t flags;
/* Recover references to our structure */
config = (FAR struct stm32_automount_config_s *)lower;
DEBUGASSERT(config && config->state);
state = config->state;
/* Save the fake enable setting */
flags = enter_critical_section();
state->enable = enable;
/* Did an interrupt occur while interrupts were disabled? */
if (enable && state->pending)
{
/* Yes.. perform the fake interrupt if the interrutp is attached */
if (state->handler)
{
bool inserted = stm32_cardinserted(config->mmcsd);
state->handler(&config->lower, state->arg, inserted);
}
state->pending = false;
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: stm32_inserted
*
* Description:
* Check if a card is inserted into the slot.
*
* Input Parameters:
* lower - An instance of the auto-mounter lower half state structure
*
* Returned Value:
* True if the card is inserted; False otherwise
*
****************************************************************************/
static bool stm32_inserted(FAR const struct automount_lower_s *lower)
{
FAR const struct stm32_automount_config_s *config;
config = (FAR struct stm32_automount_config_s *)lower;
DEBUGASSERT(config && config->state);
return stm32_cardinserted(config->mmcsd);
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_automount_initialize
*
* Description:
* Configure auto-mounters for each enabled MMCSD MikroBus slot
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
int stm32_automount_initialize(void)
{
FAR void *handle;
finfo("Initializing automounter(s)\n");
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
/* Initialize the MB1 MMCSD auto-mounter */
handle = automount_initialize(&g_mb1_mmcsdconfig.lower);
if (!handle)
{
ferr("ERROR: Failed to initialize auto-mounter for MB1 MMCSD\n");
return ERROR;
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
/* Initialize the MB2 MMCSD auto-mounter */
handle = automount_initialize(&g_mb2_mmcsdconfig.lower);
if (!handle)
{
ferr("ERROR: Failed to initialize auto-mounter for MB2 MMCSD\n");
return ERROR;
}
#endif
return OK;
}
/****************************************************************************
* Name: stm32_automount_event
*
* Description:
* The HSMCI card detection logic has detected an insertion or removal
* event. It has already scheduled the MMC/SD block driver operations.
* Now we need to schedule the auto-mount event which will occur with a
* substantial delay to make sure that everything has settle down.
*
* Input Parameters:
* slotno - Identifies the MB slot: MB1_MMCSD_SLOTNO or MB2_MMCSD_SLOTNO.
* There is a terminology problem here: Each HSMCI supports two slots,
* slot A and slot B. Only slot A is used. So this is not a really a
* slot, but an HSCMI peripheral number.
* inserted - True if the card is inserted in the slot. False otherwise.
*
* Returned Value:
* None
*
* Assumptions:
* Interrupts are disabled.
*
****************************************************************************/
void stm32_automount_event(int slotno, bool inserted)
{
FAR const struct stm32_automount_config_s *config;
FAR struct stm32_automount_state_s *state;
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT
/* Is this a change in the MB1 MMCSD slot insertion state? */
if (slotno == MB1_MMCSD_SLOTNO)
{
/* Yes.. Select the MB1 MMCSD automounter */
config = &g_mb1_mmcsdconfig;
state = &g_mb1_mmcsdstate;
}
else
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT
/* Is this a change in the MB2 MMCSD slot insertion state? */
if (slotno == MB2_MMCSD_SLOTNO)
{
/* Yes.. Select the MB2 MMCSD automounter */
config = &g_mb2_mmcsdconfig;
state = &g_mb2_mmcsdstate;
}
else
#endif
{
ferr("ERROR: Unsupported MMCSD%d\n", slotno);
return;
}
/* Is the auto-mounter interrupt attached? */
if (state->handler)
{
/* Yes.. Have we been asked to hold off interrupts? */
if (!state->enable)
{
/* Yes.. just remember that there is a pending interrupt. We will
* deliver the interrupt when interrupts are "re-enabled."
*/
state->pending = true;
}
else
{
/* No.. forward the event to the handler */
state->handler(&config->lower, state->arg, inserted);
}
}
}
#endif /* HAVE_AUTOMOUNTER */
@@ -0,0 +1,106 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "clicker2-stm32.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
#ifdef CONFIG_STM32_OTGFS
/* Initialize USB if the 1) OTG FS controller is in the configuration and
* 2) disabled, and 3) the weak function stm32_usb_configure() has been
* brought into the build. Presumeably either CONFIG_USBDEV or
* CONFIG_USBHOST is also selected.
*/
stm32_usb_configure();
#endif
#ifdef CONFIG_ARCH_LEDS
/* Configure on-board LEDs if LED support has been selected. */
board_autoled_initialize();
#endif
#ifdef CONFIG_ARCH_BUTTONS
/* Configure on-board BUTTONs if BUTTON support has been selected. */
board_button_initialize();
#endif
}
/****************************************************************************
* Name: board_late_initialize
*
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
*
****************************************************************************/
#ifdef CONFIG_BOARD_LATE_INITIALIZE
void board_late_initialize(void)
{
/* Perform board-specific initialization here if so configured */
stm32_bringup();
}
#endif
@@ -0,0 +1,194 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include <nuttx/fs/fs.h>
#include <nuttx/input/buttons.h>
#ifdef CONFIG_USBMONITOR
# include <nuttx/usb/usbmonitor.h>
#endif
#ifdef CONFIG_RNDIS
# include <nuttx/usb/rndis.h>
# include <net/if.h>
#endif
#include "stm32.h"
#include "clicker2-stm32.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_RNDIS
# ifndef CONFIG_CLICKER2_STM32_RNDIS_MACADDR
# define CONFIG_CLICKER2_STM32_RNDIS_MACADDR 0xfadedeadbeef
# endif
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_bringup
*
* Description:
* Perform architecture-specific initialization
*
* CONFIG_BOARD_LATE_INITIALIZE=y :
* Called from board_late_initialize().
*
* CONFIG_BOARD_LATE_INITIALIZE=n && CONFIG_LIB_BOARDCTL=y :
* Called from the NSH library
*
****************************************************************************/
int stm32_bringup(void)
{
int ret;
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount procfs at /proc: %d\n", ret);
}
#endif
#ifdef CONFIG_CAN
/* Initialize CAN and register the CAN driver. */
ret = stm32_can_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_can_setup failed: %d\n", ret);
}
#endif
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */
ret = stm32_adc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
}
#endif
#ifdef HAVE_USBMONITOR
/* Start the USB Monitor */
ret = usbmonitor_start();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to start USB monitor: %d\n", ret);
}
#endif
#if defined(CONFIG_CLICKER2_STM32_MB1_BEE) || defined(CONFIG_CLICKER2_STM32_MB2_BEE)
/* Configure MRF24J40 wireless */
ret = stm32_mrf24j40_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_mrf24j40_initialize() failed: %d\n",
ret);
}
#endif
#if defined(CONFIG_CLICKER2_STM32_MB1_XBEE) || defined(CONFIG_CLICKER2_STM32_MB2_XBEE)
/* Configure XBee wireless */
ret = stm32_xbee_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_xbee_initialize() failed: %d\n", ret);
}
#endif
#if defined(CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT) || \
defined(CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT)
/* Configure uSD automounter */
ret = stm32_automount_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_automount_initialize() failed: %d\n",
ret);
}
#endif
#if defined(CONFIG_CLICKER2_STM32_MB1_MMCSD) || defined(CONFIG_CLICKER2_STM32_MB2_MMCSD)
/* Configure uSD card slot */
ret = stm32_mmcsd_initialize();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_mmcsd_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_INPUT_BUTTONS
/* Register the BUTTON driver */
ret = btn_lower_initialize("/dev/buttons");
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: btn_lower_initialize() failed: %d\n", ret);
}
#endif
#ifdef CONFIG_RNDIS
uint8_t mac[IFHWADDRLEN];
mac[0] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 5)) & 0xff;
mac[1] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 4)) & 0xff;
mac[2] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 3)) & 0xff;
mac[3] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 2)) & 0xff;
mac[4] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 1)) & 0xff;
mac[5] = (CONFIG_CLICKER2_STM32_RNDIS_MACADDR >> (8 * 0)) & 0xff;
/* Register USB RNDIS Driver */
ret = usbdev_rndis_initialize(mac);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: usbdev_rndis_initialize() failed %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}
@@ -0,0 +1,121 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_buttons.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "stm32_gpio.h"
#include "stm32_exti.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
/* Configure BUTTONS T2-T3 GPIOs for input */
stm32_configgpio(GPIO_BTN_T2);
stm32_configgpio(GPIO_BTN_T3);
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
/* Check that state of each key. A low value will be sensed when the
* button is pressed.
*/
if (!stm32_gpioread(GPIO_BTN_T2))
{
ret |= BUTTON_T2_BIT;
}
if (!stm32_gpioread(GPIO_BTN_T3))
{
ret |= BUTTON_T3_BIT;
}
return ret;
}
/****************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT definitions in board.h for the meaning of each bit.
*
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See
* the BUTTON_* definitions in board.h for the meaning of enumeration
* value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
uint32_t btncfg;
btncfg = (id == BUTTON_T2) ? GPIO_BTN_T2 : GPIO_BTN_T3;
return stm32_gpiosetevent(btncfg, true, true, true, irqhandler, arg);
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,98 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_can.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/can/can.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "stm32_can.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_CAN
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#if defined(CONFIG_STM32_CAN1) && defined(CONFIG_STM32_CAN2)
# warning "Both CAN1 and CAN2 are enabled. Only CAN1 is connected."
# undef CONFIG_STM32_CAN2
#endif
#ifdef CONFIG_STM32_CAN1
# define CAN_PORT 1
#else
# define CAN_PORT 2
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_can_setup
*
* Description:
* Initialize CAN and register the CAN device
*
****************************************************************************/
int stm32_can_setup(void)
{
#if defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2)
struct can_dev_s *can;
int ret;
/* Call stm32_caninitialize() to get an instance of the CAN interface */
can = stm32_caninitialize(CAN_PORT);
if (can == NULL)
{
canerr("ERROR: Failed to get CAN interface\n");
return -ENODEV;
}
/* Register the CAN driver at "/dev/can0" */
ret = can_register("/dev/can0", can);
if (ret < 0)
{
canerr("ERROR: can_register failed: %d\n", ret);
return ret;
}
return OK;
#else
return -ENODEV;
#endif
}
#endif /* CONFIG_CAN */
@@ -0,0 +1,436 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_mmcsd.c
*
* Copyright (C) 2017 Verge Inc. All rights reserved.
* Author: Anthony Merlino <anthony@vergeaero.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/spi/spi.h>
#include <nuttx/mmcsd.h>
#include <nuttx/wqueue.h>
#include "stm32_spi.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_MMCSD_SPI
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if !defined(CONFIG_CLICKER2_STM32_MB1_MMCSD) && \
!defined(CONFIG_CLICKER2_STM32_MB2_MMCSD)
# error Only the Mikroe uSD click boards are supported
#endif
/* Can't support MMC/SD features if mountpoints are disabled or if SDIO
* support is not enabled.
*/
#if defined(CONFIG_DISABLE_MOUNTPOINT)
# error Mountpoints are required for MMCSD support
#endif
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
# ifndef CONFIG_STM32_SPI3
# error MMCSD on mikroBUS1 requires CONFIG_STM32_SPI3
# endif
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
# ifndef CONFIG_STM32_SPI2
# error MMCSD on mikroBUS1 requires CONFIG_STM32_SPI2
# endif
#endif
#ifdef CONFIG_SCHED_LPWORK
# define MMCSDWORK LPWORK
#elif defined (CONFIG_SCHED_HPWORK)
# define MMCSDWORK HPWORK
#else
# error High or low priority work queue required for MMCSD support
#endif
/* Card Detect
*
* mikroBUS1 Card Detect (AN pin): PE10-MB1_INT
* mikroBUS2 Card Detect (AN pin: PE14-MB2_INT
*
* There is a pull-up on the uSD click board`
*/
#define GPIO_MB1_CD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN2)
#define GPIO_MB2_CD (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN3)
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure holds static information unique to one MMCSD slot */
struct stm32_mmcsd_state_s
{
uint8_t spidev; /* SPI bus used for MMCSD */
uint8_t slotno; /* Slot number */
int minor; /* The MMC/SD minor device number */
uint32_t cdcfg; /* Card detect PIO pin configuration */
xcpt_t handler; /* Interrupt handler */
bool cd; /* TRUE: card is inserted */
spi_mediachange_t callback; /* SPI media change callback */
FAR void *cbarg; /* Argument to pass to media change callback */
struct work_s work; /* For deferring card detect interrupt work */
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
static bool stm32_cardinserted_internal(struct stm32_mmcsd_state_s *state);
static void stm32_mmcsd_carddetect(FAR void *arg);
static int stm32_mmcsd_setup(FAR struct stm32_mmcsd_state_s *);
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
static int stm32_mb1_mmcsd_carddetect(int irq,
FAR void *regs,
FAR void *arg);
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
static int stm32_mb2_mmcsd_carddetect(int irq,
FAR void *regs,
FAR void *arg);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* MMCSD device state */
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
static int stm32_mb1_mmcsd_carddetect(int irq, void *regs, FAR void *arg);
static struct stm32_mmcsd_state_s g_mb1_mmcsd =
{
.spidev = 3,
.slotno = MB1_MMCSD_SLOTNO,
.minor = MB1_MMCSD_MINOR,
.cdcfg = GPIO_MB1_CD,
.handler = stm32_mb1_mmcsd_carddetect,
.callback = NULL,
.cbarg = NULL,
};
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
static int stm32_mb2_mmcsd_carddetect(int irq, void *regs, FAR void *arg);
static struct stm32_mmcsd_state_s g_mb2_mmcsd =
{
.spidev = 2,
.slotno = MB2_MMCSD_SLOTNO,
.minor = MB2_MMCSD_MINOR,
.cdcfg = GPIO_MB2_CD,
.handler = stm32_mb2_mmcsd_carddetect,
.callback = NULL,
.cbarg = NULL,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_cardinserted_internal
*
* Description:
* Check if a card is inserted into the selected MMCSD slot
*
****************************************************************************/
static bool stm32_cardinserted_internal(struct stm32_mmcsd_state_s *state)
{
bool inserted;
/* Get the state of the PIO pin */
inserted = stm32_gpioread(state->cdcfg);
finfo("Slot %d inserted: %s\n", state->slotno, inserted ? "NO" : "YES");
return !inserted;
}
/****************************************************************************
* Name: stm32_mmcsd_carddetect, stm32_mb1_mmcsd_carddetect, and
* stm32_mb2_mmcsd_carddetect
*
* Description:
* Card detect interrupt handlers
*
****************************************************************************/
static void stm32_mmcsd_carddetect(FAR void *arg)
{
bool cd;
FAR struct stm32_mmcsd_state_s *state =
(FAR struct stm32_mmcsd_state_s *)arg;
/* Get the current card insertion state */
cd = stm32_cardinserted_internal(state);
/* Has the card detect state changed? */
if (cd != state->cd)
{
/* Yes... remember that new state and inform the HSMCI driver */
state->cd = cd;
/* Report the new state to the SPI driver */
if (state->callback)
{
state->callback(state->cbarg);
}
}
#ifdef HAVE_AUTOMOUNTER
/* Let the automounter know about the insertion event */
stm32_automount_event(state->slotno, stm32_cardinserted(state->slotno));
#endif
}
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
static int stm32_mb1_mmcsd_carddetect(int irq, FAR void *regs, FAR void *arg)
{
if (work_available(&g_mb1_mmcsd.work))
{
return work_queue(MMCSDWORK, &g_mb1_mmcsd.work, stm32_mmcsd_carddetect,
&g_mb1_mmcsd, 0);
}
return OK;
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
static int stm32_mb2_mmcsd_carddetect(int irq, FAR void *regs, FAR void *arg)
{
if (work_available(&g_mb2_mmcsd.work))
{
return work_queue(MMCSDWORK, &g_mb2_mmcsd.work, stm32_mmcsd_carddetect,
&g_mb2_mmcsd, 0);
}
return OK;
}
#endif
static int stm32_mmcsd_setup(struct stm32_mmcsd_state_s *state)
{
struct spi_dev_s *spi;
int ret;
/* Initialize the SPI bus and get an instance of the SPI interface */
spi = stm32_spibus_initialize(state->spidev);
if (spi == NULL)
{
spierr("ERROR: Failed to initialize SPI bus %d\n", state->spidev);
return -ENODEV;
}
ret = mmcsd_spislotinitialize(state->minor, state->slotno, spi);
if (ret < 0)
{
mcerr("ERROR: Failed to bind SPI port %d to SD slot %d\n",
state->spidev, state->slotno);
return ret;
}
/* Initialize Card Detect pin and enable interrupt on edges */
stm32_configgpio(state->cdcfg);
stm32_gpiosetevent(state->cdcfg, true, true, true, state->handler, NULL);
state->cd = stm32_cardinserted_internal(state);
if (state->callback)
{
state->callback(state->cbarg);
}
#ifdef HAVE_AUTOMOUNTER
/* Let the automounter know about the insertion event */
stm32_automount_event(state->slotno, stm32_cardinserted(state->slotno));
#endif
mcinfo("INFO: mmcsd%d card has been initialized successfully\n",
state->minor);
return OK;
}
/****************************************************************************
* Public Function
****************************************************************************/
/****************************************************************************
* Name: stm32_mmcsd_initialize
*
* Description:
* Initialize the MMCSD device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_mmcsd_initialize(void)
{
int ret;
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
finfo("Configuring MMCSD on mikroBUS1\n");
ret = stm32_mmcsd_setup(&g_mb1_mmcsd);
if (ret < 0)
{
mcerr("ERROR: Failed to initialize MMCSD on mikroBus1: %d\n", ret);
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
finfo("Configuring MMCSD on mikroBUS2\n");
ret = stm32_mmcsd_setup(&g_mb2_mmcsd);
if (ret < 0)
{
mcerr("ERROR: Failed to initialize MMCSD on mikroBus2: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}
/****************************************************************************
* Name: stm32_cardinserted
*
* Description:
* Check if a card is inserted into the selected MMCSD slot
*
****************************************************************************/
bool stm32_cardinserted(int slotno)
{
struct stm32_mmcsd_state_s *state;
/* Get the MMCSD description */
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
if (slotno == g_mb1_mmcsd.slotno)
{
state = &g_mb1_mmcsd;
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
if (slotno == g_mb2_mmcsd.slotno)
{
state = &g_mb2_mmcsd;
}
#endif
if (!state)
{
ferr("ERROR: No state for slotno %d\n", slotno);
return false;
}
/* Return the state of the CD pin */
return stm32_cardinserted_internal(state);
}
/****************************************************************************
* Name: stm32_spi2register
*
* Description:
* Registers media change callback
****************************************************************************/
int stm32_spi2register(struct spi_dev_s *dev, spi_mediachange_t callback,
void *arg)
{
spiinfo("INFO: Registering spi2 device\n");
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
g_mb2_mmcsd.callback = callback;
g_mb2_mmcsd.cbarg = arg;
#endif
return OK;
}
/****************************************************************************
* Name: stm32_spi3register
*
* Description:
* Registers media change callback
****************************************************************************/
int stm32_spi3register(struct spi_dev_s *dev, spi_mediachange_t callback,
void *arg)
{
spiinfo("INFO: Registering spi3 device\n");
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
g_mb1_mmcsd.callback = callback;
g_mb1_mmcsd.cbarg = arg;
#endif
return OK;
}
#endif /* CONFIG_MMCSD_SPI */
@@ -0,0 +1,326 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_mrf24j40.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/wireless/ieee802154/ieee802154_mac.h>
#include <nuttx/wireless/ieee802154/mrf24j40.h>
#include "stm32_gpio.h"
#include "stm32_exti.h"
#include "stm32_spi.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_IEEE802154_MRF24J40
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_DRIVERS_WIRELESS
# error Wireless support requires CONFIG_DRIVERS_WIRELESS
#endif
#if !defined(CONFIG_CLICKER2_STM32_MB1_BEE) && \
!defined(CONFIG_CLICKER2_STM32_MB2_BEE)
# error Only the Mikroe BEE board is supported
#endif
#ifdef CONFIG_CLICKER2_STM32_MB1_BEE
# ifndef CONFIG_STM32_SPI3
# error Mikroe BEE on mikroBUS1 requires CONFIG_STM32_SPI3
# endif
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_BEE
# ifndef CONFIG_STM32_SPI2
# error Mikroe BEE on mikroBUS1 requires CONFIG_STM32_SPI2
# endif
#endif
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_priv_s
{
struct mrf24j40_lower_s dev;
xcpt_t handler;
FAR void *arg;
uint32_t intcfg;
uint8_t spidev;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks
* to isolate the MRF24J40 driver from differences in GPIO interrupt handling
* varying boards and MCUs.
*
* irq_attach - Attach the MRF24J40 interrupt handler to the GPIO
* interrupt
* irq_enable - Enable or disable the GPIO interrupt
*/
static int stm32_attach_irq(FAR const struct mrf24j40_lower_s *lower,
xcpt_t handler, FAR void *arg);
static void stm32_enable_irq(FAR const struct mrf24j40_lower_s *lower,
bool state);
static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv);
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the MRF24J40
* driver. This structure provides information about the configuration
* of the MRF24J40 and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active. The
* memory must be writable because, under certain circumstances, the driver
* may modify frequency or X plate resistance values.
*/
#ifdef CONFIG_CLICKER2_STM32_MB1_BEE
static struct stm32_priv_s g_mrf24j40_mb1_priv =
{
.dev.attach = stm32_attach_irq,
.dev.enable = stm32_enable_irq,
.handler = NULL,
.arg = NULL,
.intcfg = GPIO_MB1_INT,
.spidev = 3,
};
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_BEE
static struct stm32_priv_s g_mrf24j40_mb2_priv =
{
.dev.attach = stm32_attach_irq,
.dev.enable = stm32_enable_irq,
.handler = NULL,
.arg = NULL,
.intcfg = GPIO_MB2_INT,
.spidev = 2,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the MRF24J40 driver from differences in GPIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* irq_attach - Attach the MRF24J40 interrupt handler to the GPIO
* interrupt
* irq_enable - Enable or disable the GPIO interrupt
*/
static int stm32_attach_irq(FAR const struct mrf24j40_lower_s *lower,
xcpt_t handler, FAR void *arg)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
DEBUGASSERT(priv != NULL);
/* Just save the handler for use when the interrupt is enabled */
priv->handler = handler;
priv->arg = arg;
return OK;
}
static void stm32_enable_irq(FAR const struct mrf24j40_lower_s *lower,
bool state)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
/* The caller should not attempt to enable interrupts if the handler
* has not yet been 'attached'
*/
DEBUGASSERT(priv != NULL && (priv->handler != NULL || !state));
#ifdef CONFIG_CLICKER2_STM32_MRF24J40LH_VERBOSE
wlinfo("state:%d\n", (int)state);
#endif
/* Attach and enable, or detach and disable */
if (state)
{
stm32_gpiosetevent(priv->intcfg, false, true, true,
priv->handler, priv->arg);
}
else
{
stm32_gpiosetevent(priv->intcfg, false, false, false,
NULL, NULL);
}
}
/****************************************************************************
* Name: stm32_mrf24j40_devsetup
*
* Description:
* Initialize one the MRF24J40 device in one mikroBUS slot
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
static int stm32_mrf24j40_devsetup(FAR struct stm32_priv_s *priv)
{
FAR struct ieee802154_radio_s *radio;
MACHANDLE mac;
FAR struct spi_dev_s *spi;
int ret;
/* Configure the interrupt pin */
stm32_configgpio(priv->intcfg);
/* Initialize the SPI bus and get an instance of the SPI interface */
spi = stm32_spibus_initialize(priv->spidev);
if (spi == NULL)
{
wlerr("ERROR: Failed to initialize SPI bus %d\n", priv->spidev);
return -ENODEV;
}
/* Initialize and register the SPI MRF24J40 device */
radio = mrf24j40_init(spi, &priv->dev);
if (radio == NULL)
{
wlerr("ERROR: Failed to initialize SPI bus %d\n", priv->spidev);
return -ENODEV;
}
/* Create a 802.15.4 MAC device from a 802.15.4 compatible radio device. */
mac = mac802154_create(radio);
if (mac == NULL)
{
wlerr("ERROR: Failed to initialize IEEE802.15.4 MAC\n");
return -ENODEV;
}
#ifdef CONFIG_IEEE802154_NETDEV
/* Use the IEEE802.15.4 MAC interface instance to create a 6LoWPAN
* network interface by wrapping the MAC intrface instance in a
* network device driver via mac802154dev_register().
*/
ret = mac802154netdev_register(mac);
if (ret < 0)
{
wlerr("ERROR: Failed to register the MAC network driver wpan%d: %d\n",
0, ret);
return ret;
}
#endif
#ifdef CONFIG_IEEE802154_MACDEV
/* If want to call these APIs from userspace, you have to wrap the MAC
* interface in a character device viamac802154dev_register().
*/
ret = mac802154dev_register(mac, 0);
if (ret < 0)
{
wlerr("ERROR:");
wlerr(" Failed to register the MAC character driver /dev/ieee%d: %d\n",
0, ret);
return ret;
}
#endif
UNUSED(ret);
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_mrf24j40_initialize
*
* Description:
* Initialize the MRF24J40 device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_mrf24j40_initialize(void)
{
int ret;
#ifdef CONFIG_CLICKER2_STM32_MB1_BEE
wlinfo("Configuring BEE in mikroBUS1\n");
ret = stm32_mrf24j40_devsetup(&g_mrf24j40_mb1_priv);
if (ret < 0)
{
wlerr("ERROR: Failed to initialize BD in mikroBUS1: %d\n", ret);
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_BEE
wlinfo("Configuring BEE in mikroBUS2\n");
ret = stm32_mrf24j40_devsetup(&g_mrf24j40_mb2_priv);
if (ret < 0)
{
wlerr("ERROR: Failed to initialize BD in mikroBUS2: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}
#endif /* CONFIG_IEEE802154_MRF24J40 */
@@ -0,0 +1,266 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_spi.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "chip.h"
#include "stm32.h"
#include "clicker2-stm32.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the Mikroe Clicker2
* STM32 board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
#if defined(CONFIG_STM32_SPI3) && defined(CONFIG_CLICKER2_STM32_MB1_SPI)
/* Enable chip select for mikroBUS1 */
stm32_configgpio(GPIO_MB1_CS);
#endif
#if defined(CONFIG_STM32_SPI2) && defined(CONFIG_CLICKER2_STM32_MB2_SPI)
/* Enable chip select for mikroBUS2 */
stm32_configgpio(GPIO_MB2_CS);
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods
* (including stm32_spibus_initialize()) are provided by common STM32
* logic. To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
break;
#endif
#ifdef CONFIG_IEEE802154_XBEE
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
break;
#endif
#ifdef CONFIG_MMCSD_SPI
case SPIDEV_MMCSD(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB2_CS, !selected);
break;
#endif
default:
break;
}
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t status = 0;
#ifdef CONFIG_CLICKER2_STM32_MB2_MMCSD
if (devid == SPIDEV_MMCSD(0))
{
status = stm32_cardinserted(MB2_MMCSD_SLOTNO);
}
#endif
return status;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
switch (devid)
{
#ifdef CONFIG_IEEE802154_MRF24J40
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
break;
#endif
#ifdef CONFIG_IEEE802154_XBEE
case SPIDEV_IEEE802154(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
break;
#endif
#ifdef CONFIG_MMCSD_SPI
case SPIDEV_MMCSD(0):
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_MB1_CS, !selected);
break;
#endif
default:
break;
}
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
uint8_t status = 0;
#ifdef CONFIG_CLICKER2_STM32_MB1_MMCSD
if (devid == SPIDEV_MMCSD(0))
{
status |= stm32_cardinserted(MB1_MMCSD_SLOTNO);
}
#endif
return status;
}
#endif
/****************************************************************************
* Name: stm32_spi1cmddata
*
* Description:
* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
* or command (false). This function must be provided by platform-specific
* logic. This is an implementation of the cmddata method of the SPI
* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
*
* Input Parameters:
*
* spi - SPI device that controls the bus the device that requires the CMD/
* DATA selection.
* devid - If there are multiple devices on the bus, this selects which one
* to select cmd or data. NOTE: This design restricts, for example,
* one one SPI display per SPI bus.
* cmd - true: select command; false: select data
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SPI_CMDDATA
#ifdef CONFIG_STM32_SPI1
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI2
int stm32_spi2cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
/* To be provided */
return -ENODEV;
}
#endif
#ifdef CONFIG_STM32_SPI3
int stm32_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
{
/* To be provided */
return -ENODEV;
}
#endif
#endif /* CONFIG_SPI_CMDDATA */
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
@@ -0,0 +1,93 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_usb.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include "stm32_otgfs.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_STM32_OTGFS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_USBDEV
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but CONFIG_USBDEV is not"
# undef HAVE_USB
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usb_configure
*
* Description:
* Called from stm32_boardinitialize very early in inialization to setup
* USB-related GPIO pins for the Olimex STM32 P407 board.
*
****************************************************************************/
void stm32_usb_configure(void)
{
#ifdef CONFIG_STM32_OTGFS
/* The OTG FS has an internal soft pull-up.
* No GPIO configuration is required
*/
/* Configure the OTG FS VBUS sensing GPIO */
stm32_configgpio(GPIO_OTGFS_VBUS);
#endif
}
/****************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power,
* etc. while the USB is suspended.
*
****************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */
@@ -0,0 +1,87 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_userleds.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/board/board.h>
#include "stm32.h"
#include "clicker2-stm32.h"
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_userled_initialize
****************************************************************************/
uint32_t board_userled_initialize(void)
{
/* Configure LED1-2 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
return BOARD_NLEDS;
}
/****************************************************************************
* Name: board_userled
****************************************************************************/
void board_userled(int led, bool ledon)
{
gpioconfig_t ledcfg;
if (led == BOARD_LED1)
{
ledcfg = GPIO_LED1;
}
else if (led == BOARD_LED2)
{
ledcfg = GPIO_LED2;
}
else
{
return;
}
stm32_gpiowrite(ledcfg, true);
}
/****************************************************************************
* Name: board_userled_all
****************************************************************************/
void board_userled_all(uint32_t ledset)
{
stm32_gpiowrite(GPIO_LED1, (ledset & BOARD_LED1_BIT) != 0);
stm32_gpiowrite(GPIO_LED2, (ledset & BOARD_LED2_BIT) != 0);
}
#endif /* !CONFIG_ARCH_LEDS */
@@ -0,0 +1,373 @@
/****************************************************************************
* boards/arm/stm32/clicker2-stm32/src/stm32_xbee.c
*
* Copyright (C) 2017 Verge Inc. All rights reserved.
* Author: Anthony Merlino <anthony@vergeaero.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <stdint.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/fs/fs.h>
#include <nuttx/wireless/ieee802154/ieee802154_mac.h>
#include <nuttx/wireless/ieee802154/xbee.h>
#include "stm32_gpio.h"
#include "stm32_exti.h"
#include "stm32_spi.h"
#include "clicker2-stm32.h"
#ifdef CONFIG_IEEE802154_XBEE
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef CONFIG_DRIVERS_WIRELESS
# error Wireless support requires CONFIG_DRIVERS_WIRELESS
#endif
#if !defined(CONFIG_CLICKER2_STM32_MB1_XBEE) && \
!defined(CONFIG_CLICKER2_STM32_MB2_XBEE)
# error Only the Mikroe XBee board is supported
#endif
#ifdef CONFIG_CLICKER2_STM32_MB1_XBEE
# ifndef CONFIG_STM32_SPI3
# error Mikroe XBee on mikroBUS1 requires CONFIG_STM32_SPI3
# endif
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_XBEE
# ifndef CONFIG_STM32_SPI2
# error Mikroe XBee on mikroBUS1 requires CONFIG_STM32_SPI2
# endif
#endif
/* Reset
*
* mikroBUS1 Reset: PE7-MB1_RST
* mikroBUS2 Reset: PE13-MB2_RST
*
* Reset line must be configured for opendrain
*/
#define GPIO_MB1_XBEE_RST (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN7)
#define GPIO_MB2_XBEE_RST (GPIO_OUTPUT|GPIO_OPENDRAIN|GPIO_SPEED_50MHz|\
GPIO_OUTPUT_CLEAR|GPIO_PORTE|GPIO_PIN13)
/* Interrupts
*
* mikroBUS1 Interrupt: PE10-MB1_INT
* mikroBUS2 Interrupt: PE14-MB2_INT
*/
#define GPIO_MB1_XBEE_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN10)
#define GPIO_MB2_XBEE_INT (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTE|GPIO_PIN14)
/****************************************************************************
* Private Types
****************************************************************************/
struct stm32_priv_s
{
struct xbee_lower_s dev;
xcpt_t handler;
FAR void *arg;
uint32_t rstcfg;
uint32_t attncfg;
uint8_t spidev;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the XBee driver from differences in GPIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* reset - Reset the XBee using the reset pin
* attn_attach - Attach the XBee interrupt handler to the GPIO
* interrupt (ATTN)
* attn_enable - Enable or disable the GPIO interrupt
* attn_poll - Poll the current state of the GPIO interrupt (ATTN)
*/
static void stm32_reset(FAR const struct xbee_lower_s *lower);
static int stm32_attach_attn(FAR const struct xbee_lower_s *lower,
xcpt_t handler, FAR void *arg);
static void stm32_enable_attn(FAR const struct xbee_lower_s *lower,
bool state);
static bool stm32_poll_attn(FAR const struct xbee_lower_s *lower);
static int stm32_xbee_devsetup(FAR struct stm32_priv_s *priv);
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the XBee
* driver. This structure provides information about the configuration
* of the XBee and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active. The
* memory must be writable because, under certain circumstances, the driver
* may modify frequency or X plate resistance values.
*/
#ifdef CONFIG_CLICKER2_STM32_MB1_XBEE
static struct stm32_priv_s g_xbee_mb1_priv =
{
.dev.reset = stm32_reset,
.dev.attach = stm32_attach_attn,
.dev.enable = stm32_enable_attn,
.dev.poll = stm32_poll_attn,
.handler = NULL,
.arg = NULL,
.rstcfg = GPIO_MB1_XBEE_RST,
.attncfg = GPIO_MB1_XBEE_INT,
.spidev = 3,
};
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_XBEE
static struct stm32_priv_s g_xbee_mb2_priv =
{
.dev.reset = stm32_reset,
.dev.attach = stm32_attach_attn,
.dev.enable = stm32_enable_attn,
.dev.poll = stm32_poll_attn,
.handler = NULL,
.arg = NULL,
.rstcfg = GPIO_MB2_XBEE_RST,
.attncfg = GPIO_MB2_XBEE_INT,
.spidev = 2,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the XBee driver from differences in GPIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* reset - Reset the XBee using the reset pin
* attn_attach - Attach the XBee interrupt handler to the GPIO
* interrupt (ATTN)
* attn_enable - Enable or disable the GPIO interrupt
* attn_poll - Poll the current state of the GPIO interrupt (ATTN)
*/
static void stm32_reset(FAR const struct xbee_lower_s *lower)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
DEBUGASSERT(priv != NULL);
/* Hold reset line low for min. 200ns */
stm32_gpiowrite(priv->rstcfg, false);
up_udelay(1);
stm32_gpiowrite(priv->rstcfg, true);
up_mdelay(100);
}
static int stm32_attach_attn(FAR const struct xbee_lower_s *lower,
xcpt_t handler, FAR void *arg)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
DEBUGASSERT(priv != NULL);
/* Just save the handler for use when the interrupt is enabled */
priv->handler = handler;
priv->arg = arg;
return OK;
}
static void stm32_enable_attn(FAR const struct xbee_lower_s *lower,
bool state)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
/* The caller should not attempt to enable interrupts if the handler
* has not yet been 'attached'
*/
DEBUGASSERT(priv != NULL && (priv->handler != NULL || !state));
#ifdef CONFIG_CLICKER2_STM32_XBEELH_VERBOSE
wlinfo("state:%d\n", (int)state);
#endif
/* Attach and enable, or detach and disable */
if (state)
{
stm32_gpiosetevent(priv->attncfg, false, true, true,
priv->handler, priv->arg);
}
else
{
stm32_gpiosetevent(priv->attncfg, false, false, false,
NULL, NULL);
}
}
static bool stm32_poll_attn(FAR const struct xbee_lower_s *lower)
{
FAR struct stm32_priv_s *priv = (FAR struct stm32_priv_s *)lower;
return !stm32_gpioread(priv->attncfg);
}
/****************************************************************************
* Name: stm32_xbee_devsetup
*
* Description:
* Initialize one the XBee device in one mikroBUS slot
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
static int stm32_xbee_devsetup(FAR struct stm32_priv_s *priv)
{
FAR struct spi_dev_s *spi;
XBEEHANDLE xbee;
int ret;
/* Configure the Reset and Attention pins */
stm32_configgpio(priv->rstcfg);
stm32_configgpio(priv->attncfg);
/* Initialize the SPI bus and get an instance of the SPI interface */
spi = stm32_spibus_initialize(priv->spidev);
if (spi == NULL)
{
wlerr("ERROR: Failed to initialize SPI bus %d\n", priv->spidev);
return -ENODEV;
}
/* Initialize and register the SPI XBee device */
xbee = xbee_init(spi, &priv->dev);
if (xbee == NULL)
{
wlerr("ERROR: Failed to initialize XBee driver%d\n", priv->spidev);
return -ENODEV;
}
/* Register the XBee netdev providing it the XBee MAC layer to interface
* with
*/
ret = xbee_netdev_register(xbee);
if (ret < 0)
{
wlerr("ERROR: Failed to register "
"the XBee MAC network driver wpan%d: %d\n",
0, ret);
return ret;
}
return OK;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_xbee_initialize
*
* Description:
* Initialize the XBee device.
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_xbee_initialize(void)
{
int ret;
#ifdef CONFIG_CLICKER2_STM32_MB1_XBEE
wlinfo("Configuring XBee in mikroBUS1\n");
ret = stm32_xbee_devsetup(&g_xbee_mb1_priv);
if (ret < 0)
{
wlerr("ERROR: Failed to initialize XBee on mikroBUS1: %d\n", ret);
}
#endif
#ifdef CONFIG_CLICKER2_STM32_MB2_XBEE
wlinfo("Configuring XBee in mikroBUS2\n");
ret = stm32_xbee_devsetup(&g_xbee_mb2_priv);
if (ret < 0)
{
wlerr("ERROR: Failed to initialize XBee on mikroBUS2: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}
#endif /* CONFIG_IEEE802154_XBEE */
@@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_BOARD_CLOUDCTRL
endif
@@ -0,0 +1,556 @@
README
======
This README discusses issues unique to NuttX configurations for the CloudController
development board featuring the STMicro STM32F107VCT MCU.
Features of the CloudController board include:
- STM32F107VCT
- 10/100M PHY (DM9161AEP)
- USB OTG
- USART connectos (USART1-2)
- SPI Flash (W25X16)
- (3) LEDs (LED1-3)
- (3) Buttons (KEY1-3, USERKEY2, USERKEY, TEMPER, WAKEUP)
- 5V/3.3V power conversion
- SWD
Contents
========
- STM32F107VCT Pin Usage
- Cloudctrl-specific Configuration Options
- LEDs
- Cloudctrl-specific Configuration Options
- Configurations
STM32F107VCT Pin Usage
======================
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
**23 PA0 WAKEUP Connected to KEY4. Active low: Closing KEY4 pulls WAKEUP to ground.
24 PA1 MII_RX_CLK
RMII_REF_CLK
25 PA2 MII_MDIO
26 PA3 315M_VT
29 PA4 DAC_OUT1 To CON5(CN14)
30 PA5 DAC_OUT2 To CON5(CN14). JP10
SPI1_SCK To the SD card, SPI FLASH
31 PA6 SPI1_MISO To the SD card, SPI FLASH
32 PA7 SPI1_MOSI To the SD card, SPI FLASH
67 PA8 MCO To DM9161AEP PHY
68 PA9 USB_VBUS MINI-USB-AB. JP3
USART1_TX MAX3232 to CN5
69 PA10 USB_ID MINI-USB-AB. JP5
USART1_RX MAX3232 to CN5
70 PA11 USB_DM MINI-USB-AB
71 PA12 USB_DP MINI-USB-AB
72 PA13 TMS/SWDIO
76 PA14 TCK/SWCLK
77 PA15 TDI
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
35 PB0 ADC_IN1 To CON5(CN14)
36 PB1 ADC_IN2 To CON5(CN14)
37 PB2 DATA_LE To TFT LCD (CN13)
BOOT1 JP13
89 PB3 TDO/SWO
90 PB4 TRST
91 PB5 CAN2_RX
92 PB6 CAN2_TX JP11
I2C1_SCL
93 PB7 I2C1_SDA
95 PB8 USB_PWR Drives USB VBUS
96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
47 PB10 USERKEY Connected to KEY2
48 PB11 MII_TX_EN Ethernet PHY
51 PB12 I2S_WS Audio DAC
MII_TXD0 Ethernet PHY
52 PB13 I2S_CK Audio DAC
MII_TXD1 Ethernet PHY
53 PB14 SD_CD There is confusion here. Schematic is wrong LCD_WR is PB14.
54 PB15 I2S_DIN Audio DAC
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
15 PC0 POTENTIO_METER
16 PC1 MII_MDC Ethernet PHY
17 PC2 WIRELESS_INT
18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
33 PC4 USERKEY2 Connected to KEY1
34 PC5 TP_INT JP6. To TFT LCD (CN13) module
MII_INT Ethernet PHY
63 PC6 I2S_MCK Audio DAC. Active low: Pulled high
64 PC7 PCM1770_CS Audio DAC. Active low: Pulled high
65 PC8 LCD_CS TFT LCD (CN13). Active low: Pulled high
66 PC9 TP_CS TFT LCD (CN13). Active low: Pulled high
78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module
79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module
80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module
7 PC13 TAMPER Connected to KEY3
8 PC14 OSC32_IN Y1 32.768Khz XTAL
9 PC15 OSC32_OUT Y1 32.768Khz XTAL
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
81 PD0 CAN1_RX
82 PD1 CAN1_TX
83 PD2 LED1 Active low: Pulled high
84 PD3 LED2 Active low: Pulled high
85 PD4 LED3 Active low: Pulled high
86 PD5 485_TX Same as USART2_TX but goes to SP3485
USART2_TX MAX3232 to CN6
87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
USART2_RX MAX3232 to CN6
88 PD7 LED4 Active low: Pulled high
485_DIR SP3485 read enable (not)
55 PD8 MII_RX_DV Ethernet PHY
RMII_CRSDV Ethernet PHY
56 PD9 MII_RXD0 Ethernet PHY
57 PD10 MII_RXD1 Ethernet PHY
58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
60 PD13 LCD_RS To TFT LCD (CN13)
61 PD14 LCD_WR To TFT LCD (CN13). Schematic is wrong LCD_WR is PB14.
62 PD15 LCD_RD To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
97 PE0 DB00 To TFT LCD (CN13)
98 PE1 DB01 To TFT LCD (CN13)
1 PE2 DB02 To TFT LCD (CN13)
2 PE3 DB03 To TFT LCD (CN13)
3 PE4 DB04 To TFT LCD (CN13)
4 PE5 DB05 To TFT LCD (CN13)
5 PE6 DB06 To TFT LCD (CN13)
38 PE7 DB07 To TFT LCD (CN13)
39 PE8 DB08 To TFT LCD (CN13)
40 PE9 DB09 To TFT LCD (CN13)
41 PE10 DB10 To TFT LCD (CN13)
42 PE11 DB11 To TFT LCD (CN13)
43 PE12 DB12 To TFT LCD (CN13)
44 PE13 DB13 To TFT LCD (CN13)
45 PE14 DB14 To TFT LCD (CN13)
46 PE15 DB15 To TFT LCD (CN13)
-- ---- -------------- -------------------------------------------------------------------
PN NAME SIGNAL NOTES
-- ---- -------------- -------------------------------------------------------------------
73 N/C
12 OSC_IN Y2 25Mhz XTAL
13 OSC_OUT Y2 25Mhz XTAL
94 BOOT0 JP15 (3.3V or GND)
14 RESET S5
6 VBAT JP14 (3.3V or battery)
49 VSS_1 GND
74 VSS_2 GND
99 VSS_3 GND
27 VSS_4 GND
10 VSS_5 GND
19 VSSA VSSA
20 VREF- VREF-
LEDs
====
The Cloudctrl board has four LEDs labeled LED1, LED2, LED3 and LED4 on the
board. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/up_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED1* LED2 LED3 LED4****
------------------- ----------------------- ------- ------- ------- ------
LED_STARTED NuttX has been started ON OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
LED_STACKCREATED Idle stack created OFF OFF ON OFF
LED_INIRQ In an interrupt** ON N/C N/C OFF
LED_SIGNAL In a signal handler*** N/C ON N/C OFF
LED_ASSERTION An assertion failed ON ON N/C OFF
LED_PANIC The system has crashed N/C N/C N/C ON
LED_IDLE STM32 is is sleep mode (Optional, not used)
* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
and these LEDs will give you some indication of where the failure was
** The normal state is LED1 ON and LED1 faintly glowing. This faint glow
is because of timer interrupts that result in the LED being illuminated
on a small proportion of the time.
*** LED2 may also flicker normally if signals are processed.
**** LED4 may not be available if RS-485 is also used. For RS-485, it will
then indicate the RS-485 direction.
Cloudctrl-specific Configuration Options
============================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH=arm
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXM3=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP=stm32
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
configuration features.
CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD=shenzhou (for the Cloudctrl development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SHENZHOU=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x00010000 (64Kb)
CONFIG_RAM_START - The start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_STM32_CCMEXCLUDE - Exclude CCM SRAM from the HEAP
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
Individual subsystems can be enabled:
AHB
---
CONFIG_STM32_DMA1
CONFIG_STM32_DMA2
CONFIG_STM32_CRC
CONFIG_STM32_ETHMAC
CONFIG_STM32_OTGFS
CONFIG_STM32_IWDG
CONFIG_STM32_PWR -- Required for RTC
APB1 (low speed)
----------------
CONFIG_STM32_BKP
CONFIG_STM32_TIM2
CONFIG_STM32_TIM3
CONFIG_STM32_TIM4
CONFIG_STM32_TIM5
CONFIG_STM32_TIM6
CONFIG_STM32_TIM7
CONFIG_STM32_USART2
CONFIG_STM32_USART3
CONFIG_STM32_UART4
CONFIG_STM32_UART5
CONFIG_STM32_SPI2
CONFIG_STM32_SPI3
CONFIG_STM32_I2C1
CONFIG_STM32_I2C2
CONFIG_STM32_CAN1
CONFIG_STM32_CAN2
CONFIG_STM32_DAC1
CONFIG_STM32_DAC2
CONFIG_STM32_WWDG
APB2 (high speed)
-----------------
CONFIG_STM32_TIM1
CONFIG_STM32_SPI1
CONFIG_STM32_USART1
CONFIG_STM32_ADC1
CONFIG_STM32_ADC2
Timer and I2C devices may need to the following to force power to be applied
unconditionally at power up. (Otherwise, the device is powered when it is
initialized).
CONFIG_STM32_FORCEPOWER
Timer devices may be used for different purposes. One special purpose is
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
is defined (as above) then the following may also be defined to indicate that
the timer is intended to be used for pulsed output modulation, ADC conversion,
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
to assign the timer (n) for used by the ADC or DAC, but then you also have to
configure which ADC or DAC (m) it is assigned to.
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
For each timer that is enabled for PWM usage, we need the following additional
configuration settings:
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
NOTE: The STM32 timers are each capable of generating different signals on
each of the four channels with different duty cycles. That capability is
not supported by this driver: Only one output channel per timer.
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
but without JNTRST.
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
STM32107xxx specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
support. Non-interrupt-driven, poll-waiting is recommended if the
interrupt rate would be to high in the interrupt driven case.
CONFIG_STM32_SPI_DMA - Use DMA to improve SPI transfer performance.
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
CONFIG_STM32_MII - Support Ethernet MII interface
CONFIG_STM32_MII_MCO - Use MCO to clock the MII interface
CONFIG_STM32_RMII - Support Ethernet RMII interface
CONFIG_STM32_RMII_MCO - Use MCO to clock the RMII interface
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select full duplex mode. Default: half-duplex
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
may be defined to select 100 MBps speed. Default: 10 Mbps
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
defined. The PHY status register address may diff from PHY to PHY. This
configuration sets the address of the PHY status register.
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides bit mask indicating 10 or 100MBps speed.
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provide bit mask indicating full or half duplex modes.
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
defined. This provides the value of the mode bits indicating full duplex mode.
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
but some hooks are indicated with this condition.
Cloudctrl CAN Configuration
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
CONFIG_STM32_CAN2 must also be defined)
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
Default: 8
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
Default: 4
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
mode for testing. The STM32 CAN driver does support loopback mode.
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
is defined.
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
is defined.
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
Default: 6
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
Default: 7
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
dump of all CAN registers.
Cloudctrl LCD Hardware Configuration
The LCD driver supports the following LCDs on the STM324xG_EVAL board:
AM-240320L8TNQW00H (LCD_ILI9320 or LCD_ILI9321) OR
AM-240320D5TOQW01H (LCD_ILI9325)
Configuration options.
CONFIG_LCD_LANDSCAPE - Define for 320x240 display "landscape"
support. Default is this 320x240 "landscape" orientation
For the Cloudctrl board, the edge opposite from the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_RLANDSCAPE - Define for 320x240 display "reverse
landscape" support. Default is this 320x240 "landscape"
orientation
For the Cloudctrl board, the edge next to the row of buttons
is used as the top of the display in this orientation.
CONFIG_LCD_PORTRAIT - Define for 240x320 display "portrait"
orientation support.
CONFIG_LCD_RPORTRAIT - Define for 240x320 display "reverse
portrait" orientation support.
CONFIG_LCD_RDSHIFT - When reading 16-bit gram data, there appears
to be a shift in the returned data. This value fixes the offset.
Default 5.
The LCD driver dynamically selects the LCD based on the reported LCD
ID value. However, code size can be reduced by suppressing support for
individual LCDs using:
CONFIG_STM32_ILI9320_DISABLE (includes ILI9321)
CONFIG_STM32_ILI9325_DISABLE
STM32 USB OTG FS Host Driver Support
Pre-requisites
CONFIG_USBHOST - Enable USB host support
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
CONFIG_STM32_SYSCFG - Needed
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
Default 128 (512 bytes)
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
in 32-bit words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
words. Default 96 (384 bytes)
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
want to do that?
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
debug. Depends on CONFIG_DEBUG_FEATURES.
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
packets. Depends on CONFIG_DEBUG_FEATURES.
Configurations
==============
Each Cloudctrl configuration is maintained in a sub-directory and
can be selected as follow:
tools/configure.sh shenzhou:<subdir>
Where <subdir> is one of the following:
nsh:
---
Configures the NuttShell (nsh) located at apps/examples/nsh. The
Configuration enables both the serial and telnet NSH interfaces.
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for Windows
CONFIG_NSH_DHCPC=n : DHCP is disabled
CONFIG_NSH_IPADDR=0x0a000002 : Target IP address 10.0.0.2
CONFIG_NSH_DRIPADDR=0x0a000001 : Host IP address 10.0.0.1
NOTES:
1. This example assumes that a network is connected. During its
initialization, it will try to negotiate the link speed. If you have
no network connected when you reset the board, there will be a long
delay (maybe 30 seconds?) before anything happens. That is the timeout
before the networking finally gives up and decides that no network is
available.
2. Enabling the ADC example:
The only internal signal for ADC testing is the potentiometer input:
ADC1_IN10(PC0) Potentiometer
External signals are also available on CON5 CN14:
ADC_IN8 (PB0) CON5 CN14 Pin2
ADC_IN9 (PB1) CON5 CN14 Pin1
The signal selection is hard-coded in boards/shenzhou/src/up_adc.c: The
potentiometer input (only) is selected.
These selections will enable sampling the potentiometer input at 100Hz using
Timer 1:
CONFIG_ANALOG=y : Enable analog device support
CONFIG_ADC=y : Enable generic ADC driver support
CONFIG_ADC_DMA=n : ADC DMA is not supported
CONFIG_STM32_ADC1=y : Enable ADC 1
CONFIG_STM32_TIM1=y : Enable Timer 1
CONFIG_STM32_TIM1_ADC=y : Use Timer 1 for ADC
CONFIG_STM32_TIM1_ADC1=y : Allocate Timer 1 to ADC 1
CONFIG_STM32_ADC1_SAMPLE_FREQUENCY=100 : Set sampling frequency to 100Hz
CONFIG_STM32_ADC1_TIMTRIG=0 : Trigger on timer output 0
CONFIG_STM32_FORCEPOWER=y : Apply power to TIM1 a boot up time
CONFIG_EXAMPLES_ADC=y : Enable the apps/examples/adc built-in
nxwm
----
This is a special configuration setup for the NxWM window manager
UnitTest. The NxWM window manager can be found here:
apps/graphics/NxWidgets/nxwm
The NxWM unit test can be found at:
apps/graphics/NxWidgets/UnitTests/nxwm
NOTE: JP6 selects between the touchscreen interrupt and the MII
interrupt. It should be positioned 1-2 to enable the touchscreen
interrupt.
NOTE: Reading from the LCD is not currently supported by this
configuration. The hardware will support reading from the LCD
and drivers/lcd/ssd1289.c also supports reading from the LCD.
This limits some graphics capabilities.
Reading from the LCD is not supported only because it has not
been test. If you get inspired to test this feature, you can
turn the LCD read functionality on by setting:
-CONFIG_LCD_NOGETRUN=y
+# CONFIG_LCD_NOGETRUN is not set
-CONFIG_NX_WRITEONLY=y
+# CONFIG_NX_WRITEONLY is not set
thttpd
------
This builds the THTTPD web server example using the THTTPD and
the apps/examples/thttpd application.
NOTE: This example can only be built using older GCC toolchains
due to incompatibilities introduced in later GCC releases.
@@ -0,0 +1,83 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_NSH_DISABLE_IFCONFIG is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_SPI_CALLBACK is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="cloudctrl"
CONFIG_ARCH_BOARD_CLOUDCTRL=y
CONFIG_ARCH_CHIP="stm32"
CONFIG_ARCH_CHIP_STM32=y
CONFIG_ARCH_CHIP_STM32F107VC=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=5483
CONFIG_BUILTIN=y
CONFIG_ETH0_PHY_DM9161=y
CONFIG_FAT_LCNAMES=y
CONFIG_FAT_LFN=y
CONFIG_FS_FAT=y
CONFIG_HAVE_CXX=y
CONFIG_HOST_WINDOWS=y
CONFIG_INTELHEX_BINARY=y
CONFIG_MAX_TASKS=16
CONFIG_MMCSD=y
CONFIG_MMCSD_SPICLOCK=12500000
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETDB_DNSSERVER_NOADDR=y
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_TELNETD=y
CONFIG_NETUTILS_TFTPC=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_MAX_LISTENPORTS=40
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_TCPBACKLOG=y
CONFIG_NET_TCP_CONNS=40
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_MMCSDSPIPORTNO=1
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=65536
CONFIG_RAM_START=0x20000000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_SDCLONE_DISABLE=y
CONFIG_STM32_BKP=y
CONFIG_STM32_ETHMAC=y
CONFIG_STM32_ETH_REMAP=y
CONFIG_STM32_JTAG_FULL_ENABLE=y
CONFIG_STM32_PHYADDR=0
CONFIG_STM32_PHYINIT=y
CONFIG_STM32_PHYSR=17
CONFIG_STM32_PHYSR_100FD=0x8000
CONFIG_STM32_PHYSR_100HD=0x4000
CONFIG_STM32_PHYSR_10FD=0x2000
CONFIG_STM32_PHYSR_10HD=0x1000
CONFIG_STM32_PHYSR_ALTCONFIG=y
CONFIG_STM32_PHYSR_ALTMODE=0xf000
CONFIG_STM32_PWR=y
CONFIG_STM32_RTC=y
CONFIG_STM32_SPI1=y
CONFIG_STM32_USART2=y
CONFIG_STM32_USART2_REMAP=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART2_RXBUFSIZE=128
CONFIG_USART2_SERIAL_CONSOLE=y
CONFIG_USART2_TXBUFSIZE=128
CONFIG_USER_ENTRYPOINT="nsh_main"
@@ -0,0 +1,377 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/include/board.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_CLOUDCTRL_INCLUDE_BOARD_H
#define __BOARDS_ARM_STM32_CLOUDCTRL_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
#include "stm32_rcc.h"
#include "stm32_sdio.h"
#include "stm32.h"
#include <nuttx/arch.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Clocking *****************************************************************/
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
* HSE - On-board crystal frequency is 25MHz
* LSE - 32.768 kHz
*/
#define STM32_BOARD_XTAL 25000000ul
#define STM32_HSI_FREQUENCY 8000000ul
#define STM32_LSI_FREQUENCY 40000
#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
#define STM32_LSE_FREQUENCY 32768
/* PLL output is 72MHz */
#define STM32_PLL_PREDIV2 RCC_CFGR2_PREDIV2d5 /* 25MHz / 5 => 5MHz */
#define STM32_PLL_PLL2MUL RCC_CFGR2_PLL2MULx8 /* 5MHz * 8 => 40MHz */
#define STM32_PLL_PREDIV1 RCC_CFGR2_PREDIV1d5 /* 40MHz / 5 => 8MHz */
#define STM32_PLL_PLLMUL RCC_CFGR_PLLMUL_CLKx9 /* 8MHz * 9 => 72Mhz */
#define STM32_PLL_FREQUENCY (72000000)
/* SYCLLK and HCLK are the PLL frequency */
#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY
/* APB2 clock (PCLK2) is HCLK (72MHz) */
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */
/* APB2 timers 1 and 8 will receive PCLK2. */
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
/* APB1 timers 2-7 will be twice PCLK1 */
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* MCO output driven by PLL3. From above, we already have PLL3 input
* frequency as:
*
* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz
*/
#if defined(CONFIG_STM32_MII_MCO) || defined(CONFIG_STM32_RMII_MCO)
# define BOARD_CFGR_MCO_SOURCE RCC_CFGR_PLL3CLK /* Source: PLL3 */
# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */
#endif
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
#define BOARD_LED1 0
#define BOARD_LED2 1
#define BOARD_LED3 2
#define BOARD_LED4 3
#define BOARD_NLEDS 4
/* LED bits for use with board_userled_all() */
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
* board the STM3240G-EVAL.
* The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
#define LED_HEAPALLOCATE 1 /* LED2 */
#define LED_IRQSENABLED 2 /* LED1 + LED2 */
#define LED_STACKCREATED 3 /* LED3 */
#define LED_INIRQ 4 /* LED1 + LED3 */
#define LED_SIGNAL 5 /* LED2 + LED3 */
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions *******************************************************/
/* The STM3240G-EVAL supports three buttons: */
#define BUTTON_KEY1 0 /* Name printed on board */
#define BUTTON_KEY2 1
#define BUTTON_KEY3 2
#define NUM_BUTTONS 3
#define BUTTON_USERKEY BUTTON_KEY1 /* Names in schematic */
#define BUTTON_TAMPER BUTTON_KEY2
#define BUTTON_WAKEUP BUTTON_KEY3
#define BUTTON_KEY1_BIT (1 << BUTTON_KEY1)
#define BUTTON_KEY2_BIT (1 << BUTTON_KEY2)
#define BUTTON_KEY3_BIT (1 << BUTTON_KEY3)
#define BUTTON_USERKEY_BIT BUTTON_KEY1_BIT
#define BUTTON_TAMPER_BIT BUTTON_KEY2_BIT
#define BUTTON_WAKEUP_BIT BUTTON_KEY3_BIT
/* Relays */
#define NUM_RELAYS 2
/* Pin selections ***********************************************************/
/* Ethernet
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of
* RMII_REF_CLK Ethernet PHY these signals, the DM916AEP is
* 25 PA2 MII_MDIO Ethernet PHY actually configured to work in
* 48 PB11 MII_TX_EN Ethernet PHY RMII mode.
* 51 PB12 MII_TXD0 Ethernet PHY
* 52 PB13 MII_TXD1 Ethernet PHY
* 16 PC1 MII_MDC Ethernet PHY
* 34 PC5 MII_INT Ethernet PHY
* 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP
*/
#ifdef CONFIG_STM32_ETHMAC
# ifndef CONFIG_STM32_ETH_REMAP
# error "STM32 Ethernet requires CONFIG_STM32_ETH_REMAP"
# endif
# ifndef CONFIG_STM32_RMII
# error "STM32 Ethernet requires CONFIG_STM32_RMII"
# endif
# ifndef CONFIG_STM32_RMII_MCO
# error "STM32 Ethernet requires CONFIG_STM32_RMII_MCO"
# endif
#endif
/* USB
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 68 PA9 USB_VBUS MINI-USB-AB. JP3
* 69 PA10 USB_ID MINI-USB-AB. JP5
* 70 PA11 USB_DM MINI-USB-AB
* 71 PA12 USB_DP MINI-USB-AB
* 95 PB8 USB_PWR Drives USB VBUS
*/
/* UARTS/USARTS
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP
* 87 PD6 USART2_RX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP
* 86 PD5 485_TX Same as USART2_TX but goes to SP3485
* 87 PD6 485_RX Save as USART2_RX but goes to SP3485 (see JP4)
*/
#if defined(CONFIG_STM32_USART1) && !defined(CONFIG_STM32_USART1_REMAP)
# error "CONFIG_STM32_USART1 requires CONFIG_STM32_USART1_REMAP"
#endif
#if defined(CONFIG_STM32_USART2) && !defined(CONFIG_STM32_USART2_REMAP)
# error "CONFIG_STM32_USART2 requires CONFIG_STM32_USART2_REMAP"
#endif
/* SPI
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 30 PA5 SPI1_SCK To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 31 PA6 SPI1_MISO To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 32 PA7 SPI1_MOSI To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 78 PC10 SPI3_SCK To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 79 PC11 SPI3_MISO To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 80 PC12 SPI3_MOSI To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
*/
#if defined(CONFIG_STM32_SPI1) && defined(CONFIG_STM32_SPI1_REMAP)
# error "CONFIG_STM32_SPI1 must not have CONFIG_STM32_SPI1_REMAP"
#endif
#if defined(CONFIG_STM32_SPI3) && !defined(CONFIG_STM32_SPI3_REMAP)
# error "CONFIG_STM32_SPI3 requires CONFIG_STM32_SPI3_REMAP"
#endif
/* DAC
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 29 PA4 DAC_OUT1 To CON5(CN14)
* 30 PA5 DAC_OUT2 To CON5(CN14). JP10
*/
/* ADC
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14)
* 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14)
* 15 PC0 POTENTIO_METER GPIO_ADC12_IN10
*/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: stm32_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the Shenzhou board.
* Because of the various rotations, clearing the display in the normal
* way by writing a sequences of runs that covers the entire display can
* be very slow. Here the display is cleared by simply setting all GRAM
* memory to the specified color.
*
****************************************************************************/
void stm32_lcdclear(uint16_t color);
/****************************************************************************
* Relay control functions
*
* Description:
* Non-standard functions for relay control from the Shenzhou board.
*
* NOTE: These must match the prototypes in include/nuttx/arch.h
*
****************************************************************************/
#ifdef CONFIG_ARCH_RELAYS
void up_relaysinit(void);
void relays_setstat(int relays, bool stat);
bool relays_getstat(int relays);
void relays_setstats(uint32_t relays_stat);
uint32_t relays_getstats(void);
void relays_onoff(int relays, uint32_t mdelay);
void relays_onoffs(uint32_t relays_stat, uint32_t mdelay);
void relays_resetmode(int relays);
void relays_powermode(int relays);
void relays_resetmodes(uint32_t relays_stat);
void relays_powermodes(uint32_t relays_stat);
#endif
/****************************************************************************
* Chip ID functions
*
* Description:
* Non-standard functions to obtain chip ID information.
*
****************************************************************************/
const char *stm32_getchipid(void);
const char *stm32_getchipid_string(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32_CLOUDCTRL_INCLUDE_BOARD_H */
@@ -0,0 +1,69 @@
############################################################################
# boards/arm/stm32/cloudctrl/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
# Pick the linker script
ifeq ($(CONFIG_STM32_DFU),y)
LDSCRIPT = cloudctrl-dfu.ld
else
LDSCRIPT = cloudctrl.ld
endif
ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
else
ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
ARCHOPTIMIZATION = -g
endif
ifneq ($(CONFIG_DEBUG_NOOPT),y)
ARCHOPTIMIZATION += $(MAXOPTIMIZATION) -fno-strict-aliasing -fno-strength-reduce -fomit-frame-pointer
endif
ARCHCFLAGS = -fno-builtin
ARCHCXXFLAGS = -fno-builtin -fno-exceptions -fcheck-new -fno-rtti
ARCHWARNINGS = -Wall -Wstrict-prototypes -Wshadow -Wundef
ARCHWARNINGSXX = -Wall -Wshadow -Wundef
ARCHPICFLAGS = -fpic -msingle-pic-base -mpic-register=r10
CFLAGS := $(ARCHCFLAGS) $(ARCHWARNINGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHWARNINGSXX) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS := $(CFLAGS) -D__ASSEMBLY__
NXFLATLDFLAGS1 = -r -d -warn-common
NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld -no-check-sections
LDNXFLATFLAGS = -e main -s 2048
ifneq ($(CROSSDEV),arm-nuttx-eabi-)
LDFLAGS += -nostartfiles -nodefaultlibs
endif
ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
LDFLAGS += -g
endif
@@ -0,0 +1,105 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/scripts/cloudctrl-dfu.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and
* 64K of SRAM beginning at address 0x2000:0000. Here we assume that the
* STMicro DFU bootloader is being used. In that case, the correct load .text
* load address is 0x08003000 (leaving 208K).
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08003000, LENGTH = 208K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32F107VC has 64Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,103 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/scripts/cloudctrl.ld
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/* The STM32F107VC has 256K of FLASH beginning at address 0x0800:0000 and
* 64K of SRAM beginning at address 0x2000:0000.
*/
MEMORY
{
flash (rx) : ORIGIN = 0x08000000, LENGTH = 256K
sram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
}
OUTPUT_ARCH(arm)
EXTERN(_vectors)
ENTRY(_stext)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > flash
.init_section : {
_sinit = ABSOLUTE(.);
*(.init_array .init_array.*)
_einit = ABSOLUTE(.);
} > flash
.ARM.extab : {
*(.ARM.extab*)
} > flash
__exidx_start = ABSOLUTE(.);
.ARM.exidx : {
*(.ARM.exidx*)
} > flash
__exidx_end = ABSOLUTE(.);
_eronly = ABSOLUTE(.);
/* The STM32F107VC has 64Kb of SRAM beginning at the following address */
.data : {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.gnu.linkonce.d.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > sram AT > flash
.bss : {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
_ebss = ABSOLUTE(.);
} > sram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}
@@ -0,0 +1,81 @@
############################################################################
# boards/arm/stm32/cloudctrl/src/Make.defs
#
# Copyright (C) 2012 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
# Darcy Gong <darcy.gong@gmail.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# 3. Neither the name NuttX nor the names of its contributors may be
# used to endorse or promote products derived from this software
# without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = stm32_boot.c stm32_spi.c stm32_chipid.c
ifeq ($(CONFIG_ARCH_LEDS),y)
CSRCS += stm32_autoleds.c
else
CSRCS += stm32_userleds.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += stm32_buttons.c
endif
ifeq ($(CONFIG_ARCH_RELAYS),y)
CSRCS += stm32_relays.c
endif
ifeq ($(CONFIG_STM32_OTGFS),y)
CSRCS += stm32_usb.c
endif
ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += stm32_appinit.c
endif
ifeq ($(CONFIG_MTD_W25),y)
CSRCS += stm32_w25.c
endif
ifeq ($(CONFIG_USBMSC),y)
CSRCS += stm32_usbmsc.c
endif
ifeq ($(CONFIG_ADC),y)
CSRCS += stm32_adc.c
endif
ifeq ($(CONFIG_STM32_PHYINIT),y)
CSRCS += stm32_phyinit.c
endif
DEPPATH += --dep-path board
VPATH += :board
CFLAGS += $(shell $(INCDIR) "$(CC)" $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)board)
@@ -0,0 +1,299 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/cloudctrl.h
*
* Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __BOARDS_ARM_STM32_CLOUDCTRLL_SRC_CLOUDCTRL_H
#define __BOARDS_ARM_STM32_CLOUDCTRLL_SRC_CLOUDCTRL_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <stdint.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* How many SPI modules does this chip support? */
#if STM32_NSPI < 1
# undef CONFIG_STM32_SPI1
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 2
# undef CONFIG_STM32_SPI2
# undef CONFIG_STM32_SPI3
#elif STM32_NSPI < 3
# undef CONFIG_STM32_SPI3
#endif
/* cloudctrl GPIO Configuration *********************************************/
/* STM3240G-EVAL GPIOs ******************************************************/
/* Ethernet
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of
* RMII_REF_CLK Ethernet PHY these signals, the DM916AEP is
* 25 PA2 MII_MDIO Ethernet PHY actually configured to work in RMII
* 48 PB11 MII_TX_EN Ethernet PHY mode.
* 51 PB12 MII_TXD0 Ethernet PHY
* 52 PB13 MII_TXD1 Ethernet PHY
* 16 PC1 MII_MDC Ethernet PHY
* 34 PC5 MII_INT Ethernet PHY
* 55 PD8 MII_RX_DV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 55 PD8 RMII_CRSDV Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 56 PD9 MII_RXD0 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
* 57 PD10 MII_RXD1 Ethernet PHY. Requires CONFIG_STM32_ETH_REMAP
*
* The board desdign can support a 50MHz external clock to drive the PHY
* (U9). However, on my board, U9 is not present.
*
* 67 PA8 MCO DM9161AEP
*/
#ifdef CONFIG_STM32_ETHMAC
# define GPIO_MII_INT (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN5)
#endif
/* Use MCU Pin Reset DM9161 PHY Chip */
#ifdef CONFIG_ETH0_PHY_DM9161
# define GPIO_DM9161_RET (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|GPIO_OUTPUT_SET|\
GPIO_PORTB|GPIO_PIN15)
#endif
/* Wireless
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 26 PA3 315M_VT
* 17 PC2 WIRELESS_INT
* 18 PC3 WIRELESS_CE To the NRF24L01 2.4G wireless module
* 59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
*/
#define GPIO_WIRELESS_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTD|GPIO_PIN12)
/* Buttons
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 23 PA0 WAKEUP Connected to KEY3. Active low: Closing KEY4 pulls
* WAKEUP to ground.
* 47 PB10 USERKEY Connected to KEY1
* 33 PC4 TAMPER Connected to KEY2
*/
/* BUTTONS -- NOTE that all have EXTI interrupts configured */
#define MIN_IRQBUTTON BUTTON_KEY1
#define MAX_IRQBUTTON BUTTON_KEY3
#define NUM_IRQBUTTONS (BUTTON_KEY3 - BUTTON_KEY1 + 1)
#define GPIO_BTN_WAKEUP (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN4)
#define GPIO_BTN_USERKEY (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN10)
#define GPIO_BTN_TAMPER (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTA|GPIO_PIN0)
/* LEDs
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 1 PE2 LED1 Active low: Pulled high
* 2 PE3 LED2 Active low: Pulled high
* 3 PE4 LED3 Active low: Pulled high
* 4 PE5 LED4 Active low: Pulled high
*/
#define GPIO_LED1 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN2)
#define GPIO_LED2 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN3)
#define GPIO_LED3 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN4)
#define GPIO_LED4 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN5)
/* RS-485
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 88 PD7 485_DIR SP3485 read enable (not)
*/
/* To be provided */
/* USB
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 95 PB8 USB_PWR Drives USB VBUS
*/
#define GPIO_OTGFS_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_SPEED_100MHz|\
GPIO_PUSHPULL|GPIO_PORTB|GPIO_PIN8)
/* Audio DAC
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
*/
/* To be provided */
/* SPI FLASH
*
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ---------------------------------------------------
* 96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI
* FLASH
*/
#define GPIO_FLASH_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTB|GPIO_PIN9)
/* Relays */
#define NUM_RELAYS 2
#define GPIO_RELAYS_R00 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN0)
#define GPIO_RELAYS_R01 (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
GPIO_OUTPUT_SET|GPIO_PORTE|GPIO_PIN1)
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Functions Definitions
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the STM3240G-EVAL
* board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void);
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the STM3240G-EVAL board.
*
****************************************************************************/
#ifdef CONFIG_STM32_OTGFS
void weak_function stm32_usbinitialize(void);
#endif
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality. This function will start a thread that will monitor for
* device connection/disconnection events.
*
****************************************************************************/
#if defined(CONFIG_STM32_OTGFS) && defined(CONFIG_USBHOST)
int stm32_usbhost_initialize(void);
#endif
/****************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
#ifdef CONFIG_ADC
int stm32_adc_setup(void);
#endif
/****************************************************************************
* Name: stm32_sdinitialize
*
* Description:
* Initialize the SPI-based SD card. Requires CONFIG_DISABLE_MOUNTPOINT=n
* and CONFIG_STM32_SPI1=y
*
****************************************************************************/
int stm32_sdinitialize(int minor);
/****************************************************************************
* Name: stm32_w25initialize
*
* Description:
* Initialize and register the W25 FLASH file system.
*
****************************************************************************/
#ifdef CONFIG_MTD_W25
int stm32_w25initialize(int minor);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_ARM_STM32_CLOUDCTRLL_SRC_CLOUDCTRL_H */
@@ -0,0 +1,179 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_adc.c
*
* Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/analog/adc.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "stm32_pwm.h"
#include "cloudctrl.h"
#ifdef CONFIG_ADC
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32_NADC < 3
# undef CONFIG_STM32_ADC3
#endif
#if STM32_NADC < 2
# undef CONFIG_STM32_ADC2
#endif
#if STM32_NADC < 1
# undef CONFIG_STM32_ADC1
#endif
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2) || defined(CONFIG_STM32_ADC3)
#ifndef CONFIG_STM32_ADC1
# warning "Channel information only available for ADC1"
#endif
/* The number of ADC channels in the conversion list */
#define ADC1_NCHANNELS 1
/****************************************************************************
* Private Data
****************************************************************************/
/* Identifying number of each ADC channel. The only internal signal for ADC
* testing is the potentiometer input:
*
* ADC1_IN10(PC0) Potentiometer
*
* External signals are also available on CON5 CN14:
*
* ADC_IN8 (PB0) CON5 CN14 Pin2
* ADC_IN9 (PB1) CON5 CN14 Pin1
*/
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
10 /* {10, 8, 9}; */
};
/* Configurations of pins used by each ADC channel */
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC12_IN10
};
/* {GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9}; */
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_adc_setup
*
* Description:
* Initialize ADC and register the ADC driver.
*
****************************************************************************/
int stm32_adc_setup(void)
{
#ifdef CONFIG_STM32_ADC1
static bool initialized = false;
struct adc_dev_s *adc;
int ret;
int i;
/* Check if we have already initialized */
if (!initialized)
{
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < ADC1_NCHANNELS; i++)
{
stm32_configgpio(g_pinlist[i]);
}
/* Call stm32_adcinitialize() to get an instance of the ADC interface */
adc = stm32_adcinitialize(1, g_chanlist, ADC1_NCHANNELS);
if (adc == NULL)
{
aerr("ERROR: Failed to get ADC interface\n");
return -ENODEV;
}
/* Register the ADC driver at "/dev/adc0" */
ret = adc_register("/dev/adc0", adc);
if (ret < 0)
{
aerr("ERROR: adc_register failed: %d\n", ret);
return ret;
}
/* Now we are initialized */
initialized = true;
}
return OK;
#else
return -ENOSYS;
#endif
}
#endif /* CONFIG_STM32_ADC1 || CONFIG_STM32_ADC2 || CONFIG_STM32_ADC3 */
#endif /* CONFIG_ADC */
@@ -0,0 +1,171 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_appinit.c
*
* Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "stm32.h"
#include "cloudctrl.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Assume that we support everything until convinced otherwise */
#define HAVE_USBDEV 1
#define HAVE_USBHOST 1
#define HAVE_W25 1
/* Can't support the W25 device if it SPI1 or W25 support is not enabled */
#if !defined(CONFIG_STM32_SPI1) || !defined(CONFIG_MTD_W25)
# undef HAVE_W25
#endif
/* Can't support W25 features if mountpoints are disabled */
#ifdef CONFIG_DISABLE_MOUNTPOINT
# undef HAVE_W25
#endif
/* Default W25 minor number */
#if defined(HAVE_W25) && !defined(CONFIG_NSH_W25MINOR)
# define CONFIG_NSH_W25MINOR 0
#endif
/* Can't support USB host or device features if USB OTG FS is not enabled */
#ifndef CONFIG_STM32_OTGFS
# undef HAVE_USBDEV
# undef HAVE_USBHOST
#endif
/* Can't support USB device is USB device is not enabled */
#ifndef CONFIG_USBDEV
# undef HAVE_USBDEV
#endif
/* Can't support USB host is USB host is not enabled */
#ifndef CONFIG_USBHOST
# undef HAVE_USBHOST
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform architecture specific initialization
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
int ret;
/* Initialize and register the W25 FLASH file system. */
#ifdef HAVE_W25
ret = stm32_w25initialize(CONFIG_NSH_W25MINOR);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to initialize W25 minor %d: %d\n",
CONFIG_NSH_W25MINOR, ret);
return ret;
}
#endif
/* Initialize USB host operation. stm32_usbhost_initialize() starts a
* thread will monitor for USB connection and disconnection events.
*/
#ifdef HAVE_USBHOST
ret = stm32_usbhost_initialize();
if (ret != OK)
{
syslog(LOG_ERR, "ERROR: Failed to initialize USB host: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ADC
/* Initialize ADC and register the ADC driver. */
ret = stm32_adc_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_adc_setup failed: %d\n", ret);
return ret;
}
#endif
UNUSED(ret);
return OK;
}
@@ -0,0 +1,391 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_autoleds.c
*
* Copyright (C) 2012, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/board/board.h>
#include "chip.h"
#include "arm_arch.h"
#include "arm_internal.h"
#include "stm32.h"
#include "cloudctrl.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The following definitions map the encoded LED setting to GPIO settings */
#define CLOUDCTRL_LED1 (1 << 0)
#define CLOUDCTRL_LED2 (1 << 1)
#define CLOUDCTRL_LED3 (1 << 2)
#define CLOUDCTRL_LED4 (1 << 3)
#define ON_SETBITS_SHIFT (0)
#define ON_CLRBITS_SHIFT (4)
#define OFF_SETBITS_SHIFT (8)
#define OFF_CLRBITS_SHIFT (12)
#define ON_BITS(v) ((v) & 0xff)
#define OFF_BITS(v) (((v) >> 8) & 0x0ff)
#define SETBITS(b) ((b) & 0x0f)
#define CLRBITS(b) (((b) >> 4) & 0x0f)
#define ON_SETBITS(v) (SETBITS(ON_BITS(v))
#define ON_CLRBITS(v) (CLRBITS(ON_BITS(v))
#define OFF_SETBITS(v) (SETBITS(OFF_BITS(v))
#define OFF_CLRBITS(v) (CLRBITS(OFF_BITS(v))
#define LED_STARTED_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT)
#define LED_STARTED_ON_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_STARTED_OFF_SETBITS (0 << OFF_SETBITS_SHIFT)
#define LED_STARTED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_SETBITS ((CLOUDCTRL_LED1) << OFF_SETBITS_SHIFT)
#define LED_HEAPALLOCATE_OFF_CLRBITS ((CLOUDCTRL_LED2|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_IRQSENABLED_ON_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_IRQSENABLED_ON_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_IRQSENABLED_OFF_SETBITS ((CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT)
#define LED_IRQSENABLED_OFF_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_STACKCREATED_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_STACKCREATED_ON_CLRBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2|CLOUDCTRL_LED4) << ON_CLRBITS_SHIFT)
#define LED_STACKCREATED_OFF_SETBITS ((CLOUDCTRL_LED1|CLOUDCTRL_LED2) << OFF_SETBITS_SHIFT)
#define LED_STACKCREATED_OFF_CLRBITS ((CLOUDCTRL_LED3|CLOUDCTRL_LED4) << OFF_CLRBITS_SHIFT)
#define LED_INIRQ_ON_SETBITS ((CLOUDCTRL_LED1) << ON_SETBITS_SHIFT)
#define LED_INIRQ_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_INIRQ_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_INIRQ_OFF_CLRBITS ((CLOUDCTRL_LED1) << OFF_CLRBITS_SHIFT)
#define LED_SIGNAL_ON_SETBITS ((CLOUDCTRL_LED2) << ON_SETBITS_SHIFT)
#define LED_SIGNAL_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_SIGNAL_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_SIGNAL_OFF_CLRBITS ((CLOUDCTRL_LED2) << OFF_CLRBITS_SHIFT)
#define LED_ASSERTION_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_ASSERTION_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_ASSERTION_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_ASSERTION_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT)
#define LED_PANIC_ON_SETBITS ((CLOUDCTRL_LED3) << ON_SETBITS_SHIFT)
#define LED_PANIC_ON_CLRBITS ((0) << ON_CLRBITS_SHIFT)
#define LED_PANIC_OFF_SETBITS ((0) << OFF_SETBITS_SHIFT)
#define LED_PANIC_OFF_CLRBITS ((CLOUDCTRL_LED3) << OFF_CLRBITS_SHIFT)
/****************************************************************************
* Private Function Protototypes
****************************************************************************/
/* LED State Controls */
static inline void led_clrbits(unsigned int clrbits);
static inline void led_setbits(unsigned int setbits);
static void led_setonoff(unsigned int bits);
/* LED Power Management */
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate);
#endif
/****************************************************************************
* Private Data
****************************************************************************/
static const uint16_t g_ledbits[8] =
{
(LED_STARTED_ON_SETBITS | LED_STARTED_ON_CLRBITS |
LED_STARTED_OFF_SETBITS | LED_STARTED_OFF_CLRBITS),
(LED_HEAPALLOCATE_ON_SETBITS | LED_HEAPALLOCATE_ON_CLRBITS |
LED_HEAPALLOCATE_OFF_SETBITS | LED_HEAPALLOCATE_OFF_CLRBITS),
(LED_IRQSENABLED_ON_SETBITS | LED_IRQSENABLED_ON_CLRBITS |
LED_IRQSENABLED_OFF_SETBITS | LED_IRQSENABLED_OFF_CLRBITS),
(LED_STACKCREATED_ON_SETBITS | LED_STACKCREATED_ON_CLRBITS |
LED_STACKCREATED_OFF_SETBITS | LED_STACKCREATED_OFF_CLRBITS),
(LED_INIRQ_ON_SETBITS | LED_INIRQ_ON_CLRBITS |
LED_INIRQ_OFF_SETBITS | LED_INIRQ_OFF_CLRBITS),
(LED_SIGNAL_ON_SETBITS | LED_SIGNAL_ON_CLRBITS |
LED_SIGNAL_OFF_SETBITS | LED_SIGNAL_OFF_CLRBITS),
(LED_ASSERTION_ON_SETBITS | LED_ASSERTION_ON_CLRBITS |
LED_ASSERTION_OFF_SETBITS | LED_ASSERTION_OFF_CLRBITS),
(LED_PANIC_ON_SETBITS | LED_PANIC_ON_CLRBITS |
LED_PANIC_OFF_SETBITS | LED_PANIC_OFF_CLRBITS)
};
#ifdef CONFIG_PM
static struct pm_callback_s g_ledscb =
{
.notify = led_pm_notify,
.prepare = led_pm_prepare,
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: led_clrbits
*
* Description:
* Clear all LEDs to the bit encoded state
*
****************************************************************************/
static inline void led_clrbits(unsigned int clrbits)
{
/* All LEDs are pulled up and, hence, active low */
if ((clrbits & CLOUDCTRL_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, true);
}
if ((clrbits & CLOUDCTRL_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, true);
}
if ((clrbits & CLOUDCTRL_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, true);
}
if ((clrbits & CLOUDCTRL_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, true);
}
}
/****************************************************************************
* Name: led_setbits
*
* Description:
* Set all LEDs to the bit encoded state
*
****************************************************************************/
static inline void led_setbits(unsigned int setbits)
{
/* All LEDs are pulled up and, hence, active low */
if ((setbits & CLOUDCTRL_LED1) != 0)
{
stm32_gpiowrite(GPIO_LED1, false);
}
if ((setbits & CLOUDCTRL_LED2) != 0)
{
stm32_gpiowrite(GPIO_LED2, false);
}
if ((setbits & CLOUDCTRL_LED3) != 0)
{
stm32_gpiowrite(GPIO_LED3, false);
}
if ((setbits & CLOUDCTRL_LED4) != 0)
{
stm32_gpiowrite(GPIO_LED4, false);
}
}
/****************************************************************************
* Name: led_setonoff
*
* Description:
* Set/clear all LEDs to the bit encoded state
*
****************************************************************************/
static void led_setonoff(unsigned int bits)
{
led_clrbits(CLRBITS(bits));
led_setbits(SETBITS(bits));
}
/****************************************************************************
* Name: led_pm_notify
*
* Description:
* Notify the driver of new power state. This callback is called after
* all drivers have had the opportunity to prepare for the new power state.
*
****************************************************************************/
#ifdef CONFIG_PM
static void led_pm_notify(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
switch (pmstate)
{
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
}
break;
default:
{
/* Should not get here */
}
break;
}
}
#endif
/****************************************************************************
* Name: led_pm_prepare
*
* Description:
* Request the driver to prepare for a new power state. This is a warning
* that the system is about to enter into a new power state. The driver
* should begin whatever operations that may be required to enter power
* state. The driver may abort the state change mode by returning a
* non-zero value from the callback function.
*
****************************************************************************/
#ifdef CONFIG_PM
static int led_pm_prepare(struct pm_callback_s *cb, int domain,
enum pm_state_e pmstate)
{
/* No preparation to change power modes is required by the LEDs driver.
* We always accept the state change by returning OK.
*/
return OK;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_autoled_initialize
****************************************************************************/
#ifdef CONFIG_ARCH_LEDS
void board_autoled_initialize(void)
{
/* Configure LED1-4 GPIOs for output */
stm32_configgpio(GPIO_LED1);
stm32_configgpio(GPIO_LED2);
stm32_configgpio(GPIO_LED3);
stm32_configgpio(GPIO_LED4);
}
/****************************************************************************
* Name: board_autoled_on
****************************************************************************/
void board_autoled_on(int led)
{
led_setonoff(ON_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: board_autoled_off
****************************************************************************/
void board_autoled_off(int led)
{
led_setonoff(OFF_BITS(g_ledbits[led]));
}
/****************************************************************************
* Name: up_ledpminitialize
****************************************************************************/
#ifdef CONFIG_PM
void up_ledpminitialize(void)
{
/* Register to receive power management callbacks */
int ret = pm_register(&g_ledscb);
if (ret != OK)
{
board_autoled_on(LED_ASSERTION);
}
}
#endif /* CONFIG_PM */
#endif /* CONFIG_ARCH_LEDS */
@@ -0,0 +1,104 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_boot.c
*
* Copyright (C) 2012, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "cloudctrl.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
if (stm32_spidev_initialize)
{
stm32_spidev_initialize();
}
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
if (stm32_usbinitialize)
{
stm32_usbinitialize();
}
#endif
/* Configure on-board LEDs if LED support has been selected. */
#ifdef CONFIG_ARCH_LEDS
board_autoled_initialize();
#endif
}
@@ -0,0 +1,179 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_buttons.c
*
* Copyright (C) 2012, 2014-2015, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <errno.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "cloudctrl.h"
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/* Pin configuration for each cloudctrl button. This array is indexed by
* the BUTTON_* definitions in board.h
*/
static const uint32_t g_buttons[NUM_BUTTONS] =
{
GPIO_BTN_USERKEY, GPIO_BTN_TAMPER, GPIO_BTN_WAKEUP
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_button_initialize
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
****************************************************************************/
uint32_t board_button_initialize(void)
{
int i;
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for some pins but NOT used in this file
*/
for (i = 0; i < NUM_BUTTONS; i++)
{
stm32_configgpio(g_buttons[i]);
}
return NUM_BUTTONS;
}
/****************************************************************************
* Name: board_buttons
****************************************************************************/
uint32_t board_buttons(void)
{
uint32_t ret = 0;
int i;
/* Check that state of each key */
for (i = 0; i < NUM_BUTTONS; i++)
{
/* A LOW value means that the key is pressed for most keys.
* The exception is the WAKEUP button.
*/
bool released = stm32_gpioread(g_buttons[i]);
if (i == BUTTON_WAKEUP)
{
released = !released;
}
/* Accumulate the set of depressed (not released) keys */
if (!released)
{
ret |= (1 << i);
}
}
return ret;
}
/****************************************************************************
* Button support.
*
* Description:
* board_button_initialize() must be called to initialize button resources.
* After that, board_buttons() may be called to collect the current state
* of all buttons or board_button_irq() may be called to register button
* interrupt handlers.
*
* After board_button_initialize() has been called, board_buttons() may be
* called to collect the state of all buttons. board_buttons() returns an
* 32-bit bit set with each bit associated with a button. See the
* BUTTON_*_BIT and JOYSTICK_*_BIT definitions in board.h for the meaning
* of each bit.
*
* board_button_irq() may be called to register an interrupt handler that
* will be called when a button is depressed or released. The ID value is a
* button enumeration value that uniquely identifies a button resource. See
* the BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of
* enumeration value.
*
****************************************************************************/
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
int ret = -EINVAL;
/* The following should be atomic */
if (id >= MIN_IRQBUTTON && id <= MAX_IRQBUTTON)
{
ret = stm32_gpiosetevent(g_buttons[id], true, true, true, irqhandler,
arg);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,92 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_chipid.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <arch/board/board.h>
#include "arm_arch.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
const char *stm32_getchipid(void)
{
static char cpuid[12];
int i;
for (i = 0; i < 12; i++)
{
cpuid[i] = getreg8(0x1ffff7e8+i);
}
return cpuid;
}
const char *stm32_getchipid_string(void)
{
static char cpuid[27];
int c;
int i;
for (i = 0, c = 0; i < 12; i++)
{
sprintf(&cpuid[c], "%02X", getreg8(0x1ffff7e8+11-i));
c += 2;
if (i % 4 == 3)
{
cpuid[c++] = '-';
}
}
cpuid[26] = '\0';
return cpuid;
}
@@ -0,0 +1,69 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_phyinit.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "stm32_gpio.h"
#include "stm32_eth.h"
#include "cloudctrl.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
#if defined(CONFIG_ETH0_PHY_DM9161) && defined(CONFIG_STM32_PHYINIT)
int stm32_phy_boardinitialize(int intf)
{
/* Configure the DM9161 PHY reset pin and take it out of reset */
stm32_configgpio(GPIO_DM9161_RET);
stm32_gpiowrite(GPIO_DM9161_RET, true);
return 0;
}
#endif
@@ -0,0 +1,288 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_relays.c
*
* Copyright (C) 2012, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <unistd.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/signal.h>
#include <arch/board/board.h>
#include "cloudctrl.h"
#ifdef CONFIG_ARCH_RELAYS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define RELAYS_MIN_RESET_TIME 5
#define RELAYS_RESET_MTIME 5
#define RELAYS_POWER_MTIME 50
/****************************************************************************
* Private Data
****************************************************************************/
static uint32_t g_relays_stat = 0;
static bool g_relays_init = false;
static const uint16_t g_relays[NUM_RELAYS] =
{
GPIO_RELAYS_R00
#ifdef GPIO_RELAYS_R01
, GPIO_RELAYS_R01
#endif
#ifdef GPIO_RELAYS_R02
, GPIO_RELAYS_R02
#endif
#ifdef GPIO_RELAYS_R03
, GPIO_RELAYS_R03
#endif
#ifdef GPIO_RELAYS_R04
, GPIO_RELAYS_R04
#endif
#ifdef GPIO_RELAYS_R05
, GPIO_RELAYS_R05
#endif
#ifdef GPIO_RELAYS_R06
, GPIO_RELAYS_R06
#endif
#ifdef GPIO_RELAYS_R07
, GPIO_RELAYS_R07
#endif
#ifdef GPIO_RELAYS_R08
, GPIO_RELAYS_R08
#endif
#ifdef GPIO_RELAYS_R09
, GPIO_RELAYS_R09
#endif
#ifdef GPIO_RELAYS_R10
, GPIO_RELAYS_R10
#endif
#ifdef GPIO_RELAYS_R11
, GPIO_RELAYS_R11
#endif
#ifdef GPIO_RELAYS_R12
, GPIO_RELAYS_R12
#endif
#ifdef GPIO_RELAYS_R13
, GPIO_RELAYS_R13
#endif
#ifdef GPIO_RELAYS_R14
, GPIO_RELAYS_R14
#endif
#ifdef GPIO_RELAYS_R15
, GPIO_RELAYS_R15
#endif
#ifdef GPIO_RELAYS_R16
, GPIO_RELAYS_R16
#endif
#ifdef GPIO_RELAYS_R17
, GPIO_RELAYS_R17
#endif
#ifdef GPIO_RELAYS_R18
, GPIO_RELAYS_R18
#endif
#ifdef GPIO_RELAYS_R19
, GPIO_RELAYS_R19
#endif
#ifdef GPIO_RELAYS_R20
, GPIO_RELAYS_R20
#endif
#ifdef GPIO_RELAYS_R21
, GPIO_RELAYS_R21
#endif
#ifdef GPIO_RELAYS_R22
, GPIO_RELAYS_R22
#endif
#ifdef GPIO_RELAYS_R23
, GPIO_RELAYS_R23
#endif
#ifdef GPIO_RELAYS_R24
, GPIO_RELAYS_R24
#endif
#ifdef GPIO_RELAYS_R25
, GPIO_RELAYS_R25
#endif
#ifdef GPIO_RELAYS_R26
, GPIO_RELAYS_R26
#endif
#ifdef GPIO_RELAYS_R27
, GPIO_RELAYS_R27
#endif
#ifdef GPIO_RELAYS_R28
, GPIO_RELAYS_R28
#endif
#ifdef GPIO_RELAYS_R29
, GPIO_RELAYS_R29
#endif
#ifdef GPIO_RELAYS_R30
, GPIO_RELAYS_R30
#endif
#ifdef GPIO_RELAYS_R31
, GPIO_RELAYS_R31
#endif
};
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
void up_relaysinit(void)
{
int i;
if (g_relays_init)
{
return;
}
/* Configure the GPIO pins as inputs. NOTE that EXTI interrupts are
* configured for some pins but NOT used in this file
*/
for (i = 0; i < NUM_RELAYS; i++)
{
stm32_configgpio(g_relays[i]);
stm32_gpiowrite(g_relays[i], false);
}
g_relays_init = true;
}
void relays_setstat(int relays, bool stat)
{
if ((unsigned)relays < NUM_RELAYS)
{
stm32_gpiowrite(g_relays[relays], stat);
if (!stat)
{
g_relays_stat &= ~(1 << relays);
}
else
{
g_relays_stat |= (1 << relays);
}
}
}
bool relays_getstat(int relays)
{
if ((unsigned)relays < NUM_RELAYS)
{
return (g_relays_stat & (1 << relays)) != 0;
}
return false;
}
void relays_setstats(uint32_t relays_stat)
{
int i;
for (i = 0; i < NUM_RELAYS; i++)
{
relays_setstat(i, (relays_stat & (1 << i)) != 0);
}
}
uint32_t relays_getstats(void)
{
return (uint32_t)g_relays_stat;
}
void relays_onoff(int relays, uint32_t mdelay)
{
if ((unsigned)relays < NUM_RELAYS)
{
if (mdelay > 0)
{
if (relays_getstat(relays))
{
relays_setstat(relays, false);
nxsig_usleep(RELAYS_MIN_RESET_TIME * 1000 * 1000);
}
relays_setstat(relays, true);
nxsig_usleep(mdelay * 100 * 1000);
relays_setstat(relays, false);
}
}
}
void relays_onoffs(uint32_t relays_stat, uint32_t mdelay)
{
int i;
for (i = 0; i < NUM_RELAYS; i++)
{
relays_onoff(i, mdelay);
}
}
void relays_resetmode(int relays)
{
relays_onoff(relays, RELAYS_RESET_MTIME);
}
void relays_powermode(int relays)
{
relays_onoff(relays, RELAYS_POWER_MTIME);
}
void relays_resetmodes(uint32_t relays_stat)
{
relays_onoffs(relays_stat, RELAYS_RESET_MTIME);
}
void relays_powermodes(uint32_t relays_stat)
{
relays_onoffs(relays_stat, RELAYS_POWER_MTIME);
}
#endif /* CONFIG_ARCH_BUTTONS */
@@ -0,0 +1,153 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_spi.c
*
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <nuttx/spi/spi.h>
#include <arch/board/board.h>
#include "arm_arch.h"
#include "chip.h"
#include "stm32.h"
#include "cloudctrl.h"
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the cloudctrl board.
*
****************************************************************************/
void weak_function stm32_spidev_initialize(void)
{
/* NOTE: Clocking for SPI1 and/or SPI3 was already provided in stm32_rcc.c.
* Configurations of SPI pins is performed in stm32_spi.c.
* Here, we only initialize chip select pins unique to the board
* architecture.
*/
/* SPI1 connects to the SD CARD and to the SPI FLASH */
#ifdef CONFIG_STM32_SPI1
stm32_configgpio(GPIO_FLASH_CS); /* FLASH chip select */
#endif
/* SPI3 connects to TFT LCD module and the RF24L01 2.4G wireless module */
#ifdef CONFIG_STM32_SPI3
#endif
}
/****************************************************************************
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32_spibus_initialize()) are provided by common STM32 logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip
* select pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
/* SPI1 connects to the SD CARD and to the SPI FLASH */
if (devid == SPIDEV_FLASH(0))
{
/* Set the GPIO low to select and high to de-select */
stm32_gpiowrite(GPIO_FLASH_CS, !selected);
}
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return 0;
}
#endif
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI3 */
@@ -0,0 +1,319 @@
/****************************************************************************
* boards/arm/stm32/cloudctrl/src/stm32_usb.c
*
* Copyright (C) 2012-2013, 2015, 2017 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <errno.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/kthread.h>
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbdev_trace.h>
#include "arm_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "cloudctrl.h"
#ifdef CONFIG_STM32_OTGFS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(CONFIG_USBDEV) || defined(CONFIG_USBHOST)
# define HAVE_USB 1
#else
# warning "CONFIG_STM32_OTGFS is enabled but neither CONFIG_USBDEV nor CONFIG_USBHOST"
# undef HAVE_USB
#endif
#ifndef CONFIG_USBHOST_DEFPRIO
# define CONFIG_USBHOST_DEFPRIO 50
#endif
#ifndef CONFIG_USBHOST_STACKSIZE
# ifdef CONFIG_USBHOST_HUB
# define CONFIG_USBHOST_STACKSIZE 1536
# else
# define CONFIG_USBHOST_STACKSIZE 1024
# endif
#endif
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_USBHOST
static struct usbhost_connection_s *g_usbconn;
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: usbhost_waiter
*
* Description:
* Wait for USB devices to be connected.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
static int usbhost_waiter(int argc, char *argv[])
{
struct usbhost_hubport_s *hport;
uinfo("Running\n");
for (; ; )
{
/* Wait for the device to change state */
DEBUGVERIFY(CONN_WAIT(g_usbconn, &hport));
uinfo("%s\n", hport->connected ? "connected" : "disconnected");
/* Did we just become connected? */
if (hport->connected)
{
/* Yes.. enumerate the newly connected device */
CONN_ENUMERATE(g_usbconn, hport);
}
}
/* Keep the compiler from complaining */
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_usbinitialize
*
* Description:
* Called from stm32_usbinitialize very early in inialization to setup
* USB-related GPIO pins for the STM3240G-EVAL board.
*
****************************************************************************/
void stm32_usbinitialize(void)
{
/* The OTG FS has an internal soft pull-up.
* No GPIO configuration is required
*/
/* Configure the OTG FS VBUS sensing GPIO,
* Power On, and Overcurrent GPIOs
*/
#ifdef CONFIG_STM32_OTGFS
stm32_configgpio(GPIO_OTGFS_VBUS);
stm32_configgpio(GPIO_OTGFS_PWRON);
stm32_configgpio(GPIO_OTGFS_OVER);
#endif
}
/****************************************************************************
* Name: stm32_usbhost_initialize
*
* Description:
* Called at application startup time to initialize the USB host
* functionality.
* This function will start a thread that will monitor for device
* connection/disconnection events.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_usbhost_initialize(void)
{
int pid;
int ret;
/* First, register all of the class drivers needed to support the drivers
* that we care about:
*/
uinfo("Register class drivers\n");
#ifdef CONFIG_USBHOST_MSC
/* Register the USB mass storage class */
ret = usbhost_msc_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the mass storage class\n");
}
#endif
#ifdef CONFIG_USBHOST_CDCACM
/* Register the CDC/ACM serial class */
ret = usbhost_cdcacm_initialize();
if (ret != OK)
{
uerr("ERROR: Failed to register the CDC/ACM serial class\n");
}
#endif
/* Then get an instance of the USB host interface */
uinfo("Initialize USB host\n");
g_usbconn = stm32_otgfshost_initialize(0);
if (g_usbconn)
{
/* Start a thread to handle device connection. */
uinfo("Start usbhost_waiter\n");
pid = kthread_create("usbhost", CONFIG_USBHOST_DEFPRIO,
CONFIG_USBHOST_STACKSIZE,
(main_t)usbhost_waiter, (FAR char * const *)NULL);
return pid < 0 ? -ENOEXEC : OK;
}
return -ENODEV;
}
#endif
/****************************************************************************
* Name: stm32_usbhost_vbusdrive
*
* Description:
* Enable/disable driving of VBUS 5V output. This function must be
* provided be each platform that implements the STM32 OTG FS host
* interface
*
* "On-chip 5 V VBUS generation is not supported. For this reason, a
* charge pump or, if 5 V are available on the application board, a
* basic power switch, must be added externally to drive the 5 V VBUS
* line. The external charge pump can be driven by any GPIO output.
* When the application decides to power on VBUS using the chosen GPIO,
* it must also set the port power bit in the host port control and
* status register (PPWR bit in OTG_FS_HPRT).
*
* "The application uses this field to control power to this port,
* and the core clears this bit on an overcurrent condition."
*
* Input Parameters:
* iface - For future growth to handle multiple USB host interface.
* Should be zero.
* enable - true: enable VBUS power; false: disable VBUS power
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_USBHOST
void stm32_usbhost_vbusdrive(int iface, bool enable)
{
DEBUGASSERT(iface == 0);
if (enable)
{
/* Enable the Power Switch by driving the enable pin low */
stm32_gpiowrite(GPIO_OTGFS_PWRON, false);
}
else
{
/* Disable the Power Switch by driving the enable pin high */
stm32_gpiowrite(GPIO_OTGFS_PWRON, true);
}
}
#endif
/****************************************************************************
* Name: stm32_setup_overcurrent
*
* Description:
* Setup to receive an interrupt-level callback if an overcurrent
* condition is detected.
*
* Input Parameters:
* handler - New overcurrent interrupt handler
* arg - The argument provided for the interrupt handler
*
* Returned Value:
* Zero (OK) is returned on success. Otherwise, a negated errno value
* is returned to indicate the nature of the failure.
*
****************************************************************************/
#ifdef CONFIG_USBHOST
int stm32_setup_overcurrent(xcpt_t handler, void *arg)
{
return -ENOSYS;
}
#endif
/****************************************************************************
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV
* driver is used. This function is called whenever the USB enters or
* leaves suspend mode. This is an opportunity for the board logic to
* shutdown clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
#ifdef CONFIG_USBDEV
void stm32_usbsuspend(FAR struct usbdev_s *dev, bool resume)
{
uinfo("resume: %d\n", resume);
}
#endif
#endif /* CONFIG_STM32_OTGFS */

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