feat add watchdog on xidatong board
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Liu_Weichao
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file connect_wdt.h
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* @brief define imxrt1052-board watchdog function and struct
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-05-06
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*/
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#ifndef CONNECT_WDT_H
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#define CONNECT_WDT_H
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#include <device.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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int Imxrt1052HwWdgInit(void);
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int StartWatchdog(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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/*
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright 2016-2018 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_WDOG_H_
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#define _FSL_WDOG_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup wdog
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* @{
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*/
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/*******************************************************************************
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* Definitions
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*******************************************************************************/
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/*! @name Driver version */
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/*@{*/
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/*! @brief Defines WDOG driver version */
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#define FSL_WDOG_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
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/*@}*/
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/*! @name Refresh sequence */
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/*@{*/
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#define WDOG_REFRESH_KEY (0xAAAA5555U)
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/*@}*/
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/*! @brief Defines WDOG work mode. */
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typedef struct _wdog_work_mode
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{
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bool enableWait; /*!< continue or suspend WDOG in wait mode */
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bool enableStop; /*!< continue or suspend WDOG in stop mode */
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bool enableDebug; /*!< continue or suspend WDOG in debug mode */
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} wdog_work_mode_t;
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/*! @brief Describes WDOG configuration structure. */
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typedef struct _wdog_config
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{
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bool enableWdog; /*!< Enables or disables WDOG */
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wdog_work_mode_t workMode; /*!< Configures WDOG work mode in debug stop and wait mode */
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bool enableInterrupt; /*!< Enables or disables WDOG interrupt */
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uint16_t timeoutValue; /*!< Timeout value */
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uint16_t interruptTimeValue; /*!< Interrupt count timeout value */
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bool softwareResetExtension; /*!< software reset extension */
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bool enablePowerDown; /*!< power down enable bit */
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bool enableTimeOutAssert; /*!< Enable WDOG_B timeout assertion. */
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} wdog_config_t;
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/*!
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* @brief WDOG interrupt configuration structure, default settings all disabled.
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*
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* This structure contains the settings for all of the WDOG interrupt configurations.
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*/
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enum _wdog_interrupt_enable
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{
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kWDOG_InterruptEnable = WDOG_WICR_WIE_MASK /*!< WDOG timeout generates an interrupt before reset*/
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};
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/*!
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* @brief WDOG status flags.
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*
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* This structure contains the WDOG status flags for use in the WDOG functions.
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*/
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enum _wdog_status_flags
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{
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kWDOG_RunningFlag = WDOG_WCR_WDE_MASK, /*!< Running flag, set when WDOG is enabled*/
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kWDOG_PowerOnResetFlag = WDOG_WRSR_POR_MASK, /*!< Power On flag, set when reset is the result of a powerOnReset*/
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kWDOG_TimeoutResetFlag = WDOG_WRSR_TOUT_MASK, /*!< Timeout flag, set when reset is the result of a timeout*/
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kWDOG_SoftwareResetFlag = WDOG_WRSR_SFTW_MASK, /*!< Software flag, set when reset is the result of a software*/
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kWDOG_InterruptFlag = WDOG_WICR_WTIS_MASK /*!< interrupt flag,whether interrupt has occurred or not*/
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};
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/*******************************************************************************
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* API
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*******************************************************************************/
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#if defined(__cplusplus)
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extern "C" {
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#endif /* __cplusplus */
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/*!
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* @name WDOG Initialization and De-initialization.
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* @{
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*/
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/*!
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* @brief Initializes the WDOG configuration structure.
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*
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* This function initializes the WDOG configuration structure to default values. The default
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* values are as follows.
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* @code
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* wdogConfig->enableWdog = true;
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* wdogConfig->workMode.enableWait = true;
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* wdogConfig->workMode.enableStop = false;
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* wdogConfig->workMode.enableDebug = false;
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* wdogConfig->enableInterrupt = false;
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* wdogConfig->enablePowerdown = false;
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* wdogConfig->resetExtension = flase;
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* wdogConfig->timeoutValue = 0xFFU;
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* wdogConfig->interruptTimeValue = 0x04u;
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* @endcode
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*
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* @param config Pointer to the WDOG configuration structure.
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* @see wdog_config_t
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*/
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void WDOG_GetDefaultConfig(wdog_config_t *config);
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/*!
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* @brief Initializes the WDOG.
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*
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* This function initializes the WDOG. When called, the WDOG runs according to the configuration.
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*
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* This is an example.
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* @code
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* wdog_config_t config;
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* WDOG_GetDefaultConfig(&config);
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* config.timeoutValue = 0xffU;
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* config->interruptTimeValue = 0x04u;
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* WDOG_Init(wdog_base,&config);
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* @endcode
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*
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* @param base WDOG peripheral base address
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* @param config The configuration of WDOG
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*/
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void WDOG_Init(WDOG_Type *base, const wdog_config_t *config);
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/*!
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* @brief Shuts down the WDOG.
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*
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* This function shuts down the WDOG.
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* Watchdog Enable bit is a write one once only bit. It is not
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* possible to clear this bit by a software write, once the bit is set.
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* This bit(WDE) can be set/reset only in debug mode(exception).
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*/
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void WDOG_Deinit(WDOG_Type *base);
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/*!
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* @brief Enables the WDOG module.
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*
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* This function writes a value into the WDOG_WCR register to enable the WDOG.
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* This is a write one once only bit. It is not possible to clear this bit by a software write,
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* once the bit is set. only debug mode exception.
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* @param base WDOG peripheral base address
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*/
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static inline void WDOG_Enable(WDOG_Type *base)
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{
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base->WCR |= WDOG_WCR_WDE_MASK;
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}
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static inline void SET_WDOG_WDT(WDOG_Type *base)
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{
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base->WCR |= WDOG_WCR_WDT_MASK;
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}
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/*!
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* @brief Disables the WDOG module.
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*
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* This function writes a value into the WDOG_WCR register to disable the WDOG.
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* This is a write one once only bit. It is not possible to clear this bit by a software write,once the bit is set.
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* only debug mode exception
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* @param base WDOG peripheral base address
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*/
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static inline void WDOG_Disable(WDOG_Type *base)
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{
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base->WCR &= ~WDOG_WCR_WDE_MASK;
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}
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/*!
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* @brief Trigger the system software reset.
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*
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* This function will write to the WCR[SRS] bit to trigger a software system reset.
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* This bit will automatically resets to "1" after it has been asserted to "0".
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* Note: Calling this API will reset the system right now, please using it with more attention.
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*
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* @param base WDOG peripheral base address
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*/
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static inline void WDOG_TriggerSystemSoftwareReset(WDOG_Type *base)
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{
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base->WCR &= ~WDOG_WCR_SRS_MASK;
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}
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/*!
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* @brief Trigger an output assertion.
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*
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* This function will write to the WCR[WDA] bit to trigger WDOG_B signal assertion.
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* The WDOG_B signal can be routed to external pin of the chip, the output pin will turn to
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* assertion along with WDOG_B signal.
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* Note: The WDOG_B signal will remain assert until a power on reset occurred, so, please
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* take more attention while calling it.
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*
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* @param base WDOG peripheral base address
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*/
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static inline void WDOG_TriggerSoftwareSignal(WDOG_Type *base)
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{
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base->WCR &= ~WDOG_WCR_WDA_MASK;
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}
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/*!
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* @brief Enables the WDOG interrupt.
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*
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*This bit is a write once only bit. Once the software does a write access to this bit, it will get
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*locked and cannot be reprogrammed until the next system reset assertion
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*
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* @param base WDOG peripheral base address
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* @param mask The interrupts to enable
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* The parameter can be combination of the following source if defined.
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* @arg kWDOG_InterruptEnable
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*/
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static inline void WDOG_EnableInterrupts(WDOG_Type *base, uint16_t mask)
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{
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base->WICR |= mask;
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}
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/*!
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* @brief Gets the WDOG all reset status flags.
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*
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* This function gets all reset status flags.
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*
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* @code
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* uint16_t status;
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* status = WDOG_GetStatusFlags (wdog_base);
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* @endcode
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* @param base WDOG peripheral base address
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* @return State of the status flag: asserted (true) or not-asserted (false).@see _wdog_status_flags
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* - true: a related status flag has been set.
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* - false: a related status flag is not set.
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*/
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uint16_t WDOG_GetStatusFlags(WDOG_Type *base);
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/*!
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* @brief Clears the WDOG flag.
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*
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* This function clears the WDOG status flag.
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*
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* This is an example for clearing the interrupt flag.
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* @code
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* WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);
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* @endcode
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* @param base WDOG peripheral base address
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* @param mask The status flags to clear.
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* The parameter could be any combination of the following values.
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* kWDOG_TimeoutFlag
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*/
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void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask);
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/*!
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* @brief Sets the WDOG timeout value.
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*
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* This function sets the timeout value.
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* This function writes a value into WCR registers.
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* The time-out value can be written at any point of time but it is loaded to the counter at the time
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* when WDOG is enabled or after the service routine has been performed.
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*
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* @param base WDOG peripheral base address
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* @param timeoutCount WDOG timeout value; count of WDOG clock tick.
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*/
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static inline void WDOG_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
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{
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base->WCR = (base->WCR & ~WDOG_WCR_WT_MASK) | WDOG_WCR_WT(timeoutCount);
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}
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/*!
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* @brief Sets the WDOG interrupt count timeout value.
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*
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* This function sets the interrupt count timeout value.
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* This function writes a value into WIC registers which are wirte-once.
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* This field is write once only. Once the software does a write access to this field, it will get locked
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* and cannot be reprogrammed until the next system reset assertion.
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* @param base WDOG peripheral base address
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* @param timeoutCount WDOG timeout value; count of WDOG clock tick.
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*/
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static inline void WDOG_SetInterrputTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)
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{
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base->WICR = (base->WICR & ~WDOG_WICR_WICT_MASK) | WDOG_WICR_WICT(timeoutCount);
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}
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/*!
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* @brief Disable the WDOG power down enable bit.
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*
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* This function disable the WDOG power down enable(PDE).
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* This function writes a value into WMCR registers which are wirte-once.
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* This field is write once only. Once software sets this bit it cannot be reset until the next system reset.
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* @param base WDOG peripheral base address
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*/
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static inline void WDOG_DisablePowerDownEnable(WDOG_Type *base)
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{
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base->WMCR &= ~WDOG_WMCR_PDE_MASK;
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}
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/*!
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* @brief Refreshes the WDOG timer.
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*
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* This function feeds the WDOG.
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* This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.
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*
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* @param base WDOG peripheral base address
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*/
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void WDOG_Refresh(WDOG_Type *base);
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/*@}*/
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#if defined(__cplusplus)
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}
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#endif /* __cplusplus */
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/*! @}*/
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#endif /* _FSL_WDOG_H_ */
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