Add QEMU support for XiUOS based on Cortex-M4
This commit is contained in:
bj
parent
f1755006a4
commit
2001c58d80
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export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
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export CFLAGS := -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb
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export AFLAGS := -c -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
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export LFLAGS := -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m3-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
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export CXXFLAGS := -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g
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export APPLFLAGS := -mcpu=cortex-m3 -mthumb -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-, u-T $(BSP_ROOT)/link_userspace.lds
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export DEFINES := -DHAVE_CCONFIG_H
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export ARCH = arm
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export MCU = cortex-m3
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@ -0,0 +1,59 @@
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mainmenu "XiUOS Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config KERNEL_DIR
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string
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option env="KERNEL_ROOT"
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default "../.."
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config BOARD_CORTEX_M4_EVB
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bool
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select ARCH_ARM
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default y
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source "$KERNEL_DIR/arch/Kconfig"
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menu "cortex-m4-emulator feature"
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source "$BSP_DIR/third_party_driver/Kconfig"
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menu "config default board resources"
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menu "config board app name"
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config BOARD_APP_NAME
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string "config board app name"
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default "/XiUOS_cortex-m4-emulator_app.bin"
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endmenu
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menu "config board service table"
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config SERVICE_TABLE_ADDRESS
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hex "board service table address"
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default 0x20000000
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endmenu
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menu "config hardware resources for connection"
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if CONNECTION_COMMUNICATION_ETHERNET
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config ETHERNET_UART_NAME
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string "ethernet uart name"
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default "/dev/usart3_dev3"
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endif
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if CONNECTION_COMMUNICATION_WIFI
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config WIFI_UART_NAME
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string "wifi uart name"
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default "/dev/usart3_dev3"
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endif
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endmenu
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endmenu
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endmenu
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menu "Hardware feature"
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source "$KERNEL_DIR/resources/Kconfig"
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endmenu
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source "$KERNEL_DIR/Kconfig"
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@ -0,0 +1,59 @@
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mainmenu "XiUOS Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config KERNEL_DIR
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string
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option env="KERNEL_ROOT"
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default "../.."
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config BOARD_CORTEX_M4_EVB
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bool
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select ARCH_ARM
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default y
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source "$KERNEL_DIR/arch/Kconfig"
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menu "cortex-m4-emulator feature"
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source "$BSP_DIR/third_party_driver/Kconfig"
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menu "config default board resources"
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menu "config board app name"
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config BOARD_APP_NAME
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string "config board app name"
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default "/XiUOS_cortex-m4-emulator_app.bin"
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endmenu
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menu "config board service table"
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config SERVICE_TABLE_ADDRESS
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hex "board service table address"
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default 0x20000000
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endmenu
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menu "config hardware resources for connection"
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if CONNECTION_COMMUNICATION_ETHERNET
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config ETHERNET_UART_NAME
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string "ethernet uart name"
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default "/dev/usart3_dev3"
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endif
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if CONNECTION_COMMUNICATION_WIFI
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config WIFI_UART_NAME
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string "wifi uart name"
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default "/dev/usart3_dev3"
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endif
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endmenu
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endmenu
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endmenu
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menu "Hardware feature"
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source "$KERNEL_DIR/resources/Kconfig"
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endmenu
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source "$KERNEL_DIR/Kconfig"
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mainmenu "XiUOS Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config KERNEL_DIR
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string
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option env="KERNEL_ROOT"
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default "../.."
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config BOARD_CORTEX_M4_EVB
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bool
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select ARCH_ARM
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default y
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source "$KERNEL_DIR/arch/Kconfig"
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menu "cortex-m4-emulator feature"
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source "$BSP_DIR/third_party_driver/Kconfig"
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menu "config default board resources"
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menu "config board app name"
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config BOARD_APP_NAME
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string "config board app name"
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default "/XiUOS_cortex-m4-emulator_app.bin"
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endmenu
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menu "config board service table"
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config SERVICE_TABLE_ADDRESS
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hex "board service table address"
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default 0x20000000
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endmenu
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menu "config hardware resources for connection"
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if CONNECTION_COMMUNICATION_ETHERNET
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config ETHERNET_UART_NAME
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string "ethernet uart name"
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default "/dev/usart3_dev3"
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endif
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if CONNECTION_COMMUNICATION_WIFI
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config WIFI_UART_NAME
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string "wifi uart name"
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default "/dev/usart3_dev3"
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endif
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endmenu
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endmenu
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endmenu
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menu "Hardware feature"
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source "$KERNEL_DIR/resources/Kconfig"
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endmenu
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source "$KERNEL_DIR/Kconfig"
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@ -0,0 +1,59 @@
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mainmenu "XiUOS Project Configuration"
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config BSP_DIR
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string
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option env="BSP_ROOT"
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default "."
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config KERNEL_DIR
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string
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option env="KERNEL_ROOT"
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default "../.."
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config BOARD_CORTEX_M4_EVB
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bool
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select ARCH_ARM
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default y
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source "$KERNEL_DIR/arch/Kconfig"
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menu "cortex-m4-emulator feature"
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source "$BSP_DIR/third_party_driver/Kconfig"
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menu "config default board resources"
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menu "config board app name"
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config BOARD_APP_NAME
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string "config board app name"
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default "/XiUOS_cortex-m4-emulator_app.bin"
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endmenu
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menu "config board service table"
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config SERVICE_TABLE_ADDRESS
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hex "board service table address"
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default 0x20000000
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endmenu
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menu "config hardware resources for connection"
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if CONNECTION_COMMUNICATION_ETHERNET
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config ETHERNET_UART_NAME
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string "ethernet uart name"
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default "/dev/usart3_dev3"
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endif
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if CONNECTION_COMMUNICATION_WIFI
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config WIFI_UART_NAME
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string "wifi uart name"
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default "/dev/usart3_dev3"
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endif
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endmenu
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endmenu
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endmenu
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menu "Hardware feature"
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source "$KERNEL_DIR/resources/Kconfig"
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endmenu
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source "$KERNEL_DIR/Kconfig"
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file board.c
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* @brief support stm32f407-st-discovery-board init configure and start-up
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-25
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*/
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/*************************************************
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File name: board.c
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Description: support stm32f407-st-discovery-board init configure and driver/task/... init
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Others:
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History:
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1. Date: 2021-04-25
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Author: AIIT XUOS Lab
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Modification:
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1. support stm32f407-st-discovery-board InitBoardHardware
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*************************************************/
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#include <xiuos.h>
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#include "hardware_rcc.h"
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#include "board.h"
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#include "connect_usart.h"
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#include "misc.h"
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#include <xs_service.h>
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static void ClockConfiguration()
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{
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int cr,cfgr,pllcfgr;
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int cr1,cfgr1,pllcfgr1;
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RCC->APB1ENR |= RCC_APB1ENR_PWREN;
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PWR->CR |= PWR_CR_VOS;
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RCC_HSEConfig(RCC_HSE_ON);
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if (RCC_WaitForHSEStartUp() == SUCCESS)
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{
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RCC_HCLKConfig(RCC_SYSCLK_Div1);
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RCC_PCLK2Config(RCC_HCLK_Div2);
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RCC_PCLK1Config(RCC_HCLK_Div4);
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RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
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RCC_PLLCmd(ENABLE);
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while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
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FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
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RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
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}
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SystemCoreClockUpdate();
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}
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void NVIC_Configuration(void)
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{
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#ifdef VECT_TAB_RAM
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NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
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#else
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NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
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#endif
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NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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}
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void SysTickConfiguration(void)
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{
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RCC_ClocksTypeDef rcc_clocks;
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uint32 cnts;
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RCC_GetClocksFreq(&rcc_clocks);
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cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
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cnts = cnts / 8;
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SysTick_Config(cnts);
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SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
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}
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void SysTick_Handler(int irqn, void *arg)
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{
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TickAndTaskTimesliceUpdate();
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}
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DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
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void InitBoardHardware()
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{
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int i = 0;
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int ret = 0;
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ClockConfiguration();
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NVIC_Configuration();
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SysTickConfiguration();
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#ifdef BSP_USING_UART
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Stm32HwUsartInit();
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#endif
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#ifdef KERNEL_CONSOLE
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InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
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RCC_ClocksTypeDef rcc_clocks;
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RCC_GetClocksFreq(&rcc_clocks);
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KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
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KPrintf("\nconsole init completed.\n");
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KPrintf("board initialization......\n");
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#endif
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InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
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}
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
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* You can use this software according to the terms and conditions of the Mulan PSL v2.
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* You may obtain a copy of Mulan PSL v2 at:
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* http://license.coscl.org.cn/MulanPSL2
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* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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* See the Mulan PSL v2 for more details.
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*/
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/**
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* @file board.h
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* @brief define stm32f407-st-discovery-board init configure and start-up function
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* @version 1.0
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* @author AIIT XUOS Lab
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* @date 2021-04-25
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*/
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/*************************************************
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File name: board.h
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Description: define stm32f407-st-discovery-board board init function and struct
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Others:
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History:
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1. Date: 2021-04-25
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Author: AIIT XUOS Lab
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Modification:
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1. define stm32f407-st-discovery-board InitBoardHardware
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2. define stm32f407-st-discovery-board data and bss struct
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*************************************************/
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#ifndef BOARD_H
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#define BOARD_H
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#include <stdint.h>
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extern int __stack_end__;
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extern unsigned int g_service_table_start;
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extern unsigned int g_service_table_end;
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#define SURPORT_MPU
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#define MEMORY_START_ADDRESS (&__stack_end__)
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#define MEM_OFFSET 128
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#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
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#ifdef SEPARATE_COMPILE
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typedef int (*main_t)(int argc, char *argv[]);
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typedef void (*exit_t)(void);
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struct userspace_s
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{
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main_t us_entrypoint;
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exit_t us_taskquit;
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uintptr_t us_textstart;
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uintptr_t us_textend;
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uintptr_t us_datasource;
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uintptr_t us_datastart;
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uintptr_t us_dataend;
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uintptr_t us_bssstart;
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uintptr_t us_bssend;
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uintptr_t us_heapend;
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};
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#define USERSPACE (( struct userspace_s *)(0x08080000))
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#ifndef SERVICE_TABLE_ADDRESS
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#define SERVICE_TABLE_ADDRESS (0x20000000)
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#endif
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#define USER_SRAM_SIZE 64
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#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
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#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
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#endif
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void InitBoardHardware(void);
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#endif
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@ -0,0 +1,125 @@
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/*
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* Copyright (c) 2020 AIIT XUOS Lab
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* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
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*/
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/**
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* @file board.c
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* @brief support cortex-m4-emulator-board init configure and start-up
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* @version 1.0
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* @author fudan
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* @date 2021-08-26
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*/
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/*************************************************
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File name: board.c
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Description: support cortex-m4-emulator-board init configure and driver/task/... init
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Others:
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History:
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1. Date: 2021-04-25
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Author: AIIT XUOS Lab
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Modification:
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1. support cortex-m4-emulator-board InitBoardHardware
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*************************************************/
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#include <xiuos.h>
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#include "hardware_rcc.h"
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#include "board.h"
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#include "connect_usart.h"
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#include "misc.h"
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#include <xs_service.h>
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static void ClockConfiguration()
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{
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int cr,cfgr,pllcfgr;
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int cr1,cfgr1,pllcfgr1;
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RCC->APB1ENR |= RCC_APB1ENR_PWREN;
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PWR->CR |= PWR_CR_VOS;
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RCC_HSEConfig(RCC_HSE_ON);
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if (RCC_WaitForHSEStartUp() == SUCCESS)
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||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support cortex-m4-emulator-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author fudan
|
||||
* @date 2021-08-26
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support cortex-m4-emulator-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support cortex-m4-emulator-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define cortex-m4-emulator-board init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT fudan Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.h
|
||||
Description: define cortex-m4-emulator-board board init function and struct
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-08-25
|
||||
Author: AIIT fudan Lab
|
||||
Modification:
|
||||
1. define cortex-m4-emulator-board InitBoardHardware
|
||||
2. define cortex-m4-emulator-board data and bss struct
|
||||
*************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __stack_end__;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define SURPORT_MPU
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__stack_end__)
|
||||
#define MEM_OFFSET 128
|
||||
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
|
||||
|
||||
|
||||
#ifdef SEPARATE_COMPILE
|
||||
typedef int (*main_t)(int argc, char *argv[]);
|
||||
typedef void (*exit_t)(void);
|
||||
struct userspace_s
|
||||
{
|
||||
main_t us_entrypoint;
|
||||
exit_t us_taskquit;
|
||||
uintptr_t us_textstart;
|
||||
uintptr_t us_textend;
|
||||
uintptr_t us_datasource;
|
||||
uintptr_t us_datastart;
|
||||
uintptr_t us_dataend;
|
||||
uintptr_t us_bssstart;
|
||||
uintptr_t us_bssend;
|
||||
uintptr_t us_heapend;
|
||||
};
|
||||
#define USERSPACE (( struct userspace_s *)(0x08080000))
|
||||
|
||||
#ifndef SERVICE_TABLE_ADDRESS
|
||||
#define SERVICE_TABLE_ADDRESS (0x20000000)
|
||||
#endif
|
||||
|
||||
#define USER_SRAM_SIZE 64
|
||||
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
|
||||
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
|
||||
#endif
|
||||
|
||||
void InitBoardHardware(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define cortex-m4-emulator-board init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT fudan Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.h
|
||||
Description: define cortex-m4-emulator-board board init function and struct
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-08-25
|
||||
Author: AIIT fudan Lab
|
||||
Modification:
|
||||
1. define cortex-m4-emulator-board InitBoardHardware
|
||||
2. define cortex-m4-emulator-board data and bss struct
|
||||
*************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __stack_end__;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define SURPORT_MPU
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__stack_end__)
|
||||
#define MEM_OFFSET 128
|
||||
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
|
||||
|
||||
|
||||
#ifdef SEPARATE_COMPILE
|
||||
typedef int (*main_t)(int argc, char *argv[]);
|
||||
typedef void (*exit_t)(void);
|
||||
struct userspace_s
|
||||
{
|
||||
main_t us_entrypoint;
|
||||
exit_t us_taskquit;
|
||||
uintptr_t us_textstart;
|
||||
uintptr_t us_textend;
|
||||
uintptr_t us_datasource;
|
||||
uintptr_t us_datastart;
|
||||
uintptr_t us_dataend;
|
||||
uintptr_t us_bssstart;
|
||||
uintptr_t us_bssend;
|
||||
uintptr_t us_heapend;
|
||||
};
|
||||
#define USERSPACE (( struct userspace_s *)(0x08080000))
|
||||
|
||||
#ifndef SERVICE_TABLE_ADDRESS
|
||||
#define SERVICE_TABLE_ADDRESS (0x20000000)
|
||||
#endif
|
||||
|
||||
#define USER_SRAM_SIZE 64
|
||||
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
|
||||
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
|
||||
#endif
|
||||
|
||||
void InitBoardHardware(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m4-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export USING_NEWLIB =1
|
||||
export USING_VFS = 1
|
||||
export USING_SPI = 1
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m4-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export USING_NEWLIB =1
|
||||
export USING_VFS = 1
|
||||
export USING_SPI = 1
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m4-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export USING_NEWLIB =1
|
||||
export USING_VFS = 1
|
||||
export USING_SPI = 1
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* cortex-m4-emulator feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* cortex-m4-emulator feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* cortex-m4-emulator feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,186 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* cortex-m4-emulator feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 100
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 1024
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
#define SHELL_HELP_LIST_VAR
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 2048
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 1024
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
SRC_FILES := system_init.c boot.S interrupt_vector.S coreclock.c interrupt.c svc_entry.S
|
||||
|
||||
ifeq ($(CONFIG_TASK_ISOLATION),y)
|
||||
SRC_FILES += svc_handle.c mpu.c
|
||||
endif
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#ifndef ARCH_INTERRUPT_H__
|
||||
#define ARCH_INTERRUPT_H__
|
||||
|
||||
#include <xs_base.h>
|
||||
|
||||
#define ARCH_MAX_IRQ_NUM (256 + 16)
|
||||
|
||||
#define ARCH_IRQ_NUM_OFFSET 16
|
||||
|
||||
int32 ArchEnableHwIrq(uint32 irq_num);
|
||||
int32 ArchDisableHwIrq(uint32 irq_num);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,532 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f407xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F407xx Devices vector table for GCC based toolchains.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word __bss_start
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word __bss_end
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =__stack_tp /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, = __bss_start
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = __bss_end
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
# bl __libc_init_array
|
||||
/* Call the application s entry point.*/
|
||||
/* bl main */
|
||||
# bl stm32f407_start
|
||||
bl entry
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
# /**
|
||||
# * @brief This is the code that gets called when the processor receives an
|
||||
# * unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
# * the system state for examination by a debugger.
|
||||
# * @param None
|
||||
# * @retval None
|
||||
# */
|
||||
|
||||
|
||||
# .section .text.Default_Handler,"ax",%progbits
|
||||
# Default_Handler:
|
||||
# Infinite_Loop:
|
||||
# b Infinite_Loop
|
||||
# .size Default_Handler, .-Default_Handler
|
||||
|
||||
|
||||
# /******************************************************************************
|
||||
# *
|
||||
# * The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
# * must be placed on this to ensure that it ends up at physical address
|
||||
# * 0x0000.0000.
|
||||
# *
|
||||
# *******************************************************************************/
|
||||
|
||||
# .section .isr_vector,"a",%progbits
|
||||
# .type g_pfnVectors, %object
|
||||
# .size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
|
||||
# g_pfnVectors:
|
||||
# .word __stack_tp
|
||||
# .word Reset_Handler
|
||||
# .word NMI_Handler
|
||||
# .word HardFault_Handler
|
||||
# .word MemManage_Handler
|
||||
# .word BusFault_Handler
|
||||
# .word UsageFault_Handler
|
||||
# .word 0
|
||||
# .word 0
|
||||
# .word 0
|
||||
# .word 0
|
||||
# .word SVC_Handler
|
||||
# .word DebugMon_Handler
|
||||
# .word 0
|
||||
# .word PendSV_Handler
|
||||
# .word SysTick_Handler
|
||||
|
||||
|
||||
# /* External Interrupts */
|
||||
# .word WWDG_IRQHandler /* Window WatchDog */
|
||||
# .word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||
# .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
# .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
# .word FLASH_IRQHandler /* FLASH */
|
||||
# .word RCC_IRQHandler /* RCC */
|
||||
# .word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
# .word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
# .word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
# .word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
# .word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
# .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
# .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
# .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
# .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
# .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
# .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
# .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
# .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
# .word CAN1_TX_IRQHandler /* CAN1 TX */
|
||||
# .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
|
||||
# .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
|
||||
# .word CAN1_SCE_IRQHandler /* CAN1 SCE */
|
||||
# .word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
# .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
||||
# .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
|
||||
# .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
|
||||
# .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
# .word TIM2_IRQHandler /* TIM2 */
|
||||
# .word TIM3_IRQHandler /* TIM3 */
|
||||
# .word TIM4_IRQHandler /* TIM4 */
|
||||
# .word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
# .word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
# .word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
# .word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
# .word SPI1_IRQHandler /* SPI1 */
|
||||
# .word SPI2_IRQHandler /* SPI2 */
|
||||
# .word USART1_IRQHandler /* USART1 */
|
||||
# .word USART2_IRQHandler /* USART2 */
|
||||
# .word USART3_IRQHandler /* USART3 */
|
||||
# .word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
# .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
# .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||
# .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
# .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
# .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
# .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
# .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
# .word FSMC_IRQHandler /* FSMC */
|
||||
# .word SDIO_IRQHandler /* SDIO */
|
||||
# .word TIM5_IRQHandler /* TIM5 */
|
||||
# .word SPI3_IRQHandler /* SPI3 */
|
||||
# .word UART4_IRQHandler /* UART4 */
|
||||
# .word UART5_IRQHandler /* UART5 */
|
||||
# .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
# .word TIM7_IRQHandler /* TIM7 */
|
||||
# .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
# .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
# .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
# .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
# .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
# .word ETH_IRQHandler /* Ethernet */
|
||||
# .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
|
||||
# .word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
# .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
# .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
# .word CAN2_SCE_IRQHandler /* CAN2 SCE */
|
||||
# .word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
# .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
# .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
# .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
# .word USART6_IRQHandler /* USART6 */
|
||||
# .word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
# .word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
# .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
# .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
# .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
# .word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
# .word DCMI_IRQHandler /* DCMI */
|
||||
# .word 0 /* CRYP crypto */
|
||||
# .word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
# .word FPU_IRQHandler /* FPU */
|
||||
|
||||
|
||||
|
||||
# /*******************************************************************************
|
||||
# *
|
||||
# * Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
# * As they are weak aliases, any function with the same name will override
|
||||
# * this definition.
|
||||
# *
|
||||
# *******************************************************************************/
|
||||
|
||||
# .weak NMI_Handler
|
||||
# .thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
# .weak HardFault_Handler
|
||||
# .thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
# .weak MemManage_Handler
|
||||
# .thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
# .weak BusFault_Handler
|
||||
# .thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
# .weak UsageFault_Handler
|
||||
# .thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
# .weak SVC_Handler
|
||||
# .thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
# .weak DebugMon_Handler
|
||||
# .thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
# .weak PendSV_Handler
|
||||
# .thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
# .weak SysTick_Handler
|
||||
# .thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
# .weak WWDG_IRQHandler
|
||||
# .thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
# .weak PVD_IRQHandler
|
||||
# .thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TAMP_STAMP_IRQHandler
|
||||
# .thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
# .weak RTC_WKUP_IRQHandler
|
||||
# .thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
# .weak FLASH_IRQHandler
|
||||
# .thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
# .weak RCC_IRQHandler
|
||||
# .thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI0_IRQHandler
|
||||
# .thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI1_IRQHandler
|
||||
# .thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI2_IRQHandler
|
||||
# .thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI3_IRQHandler
|
||||
# .thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI4_IRQHandler
|
||||
# .thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream0_IRQHandler
|
||||
# .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream1_IRQHandler
|
||||
# .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream2_IRQHandler
|
||||
# .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream3_IRQHandler
|
||||
# .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream4_IRQHandler
|
||||
# .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream5_IRQHandler
|
||||
# .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream6_IRQHandler
|
||||
# .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
# .weak ADC_IRQHandler
|
||||
# .thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN1_TX_IRQHandler
|
||||
# .thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN1_RX0_IRQHandler
|
||||
# .thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN1_RX1_IRQHandler
|
||||
# .thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN1_SCE_IRQHandler
|
||||
# .thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI9_5_IRQHandler
|
||||
# .thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM1_BRK_TIM9_IRQHandler
|
||||
# .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM1_UP_TIM10_IRQHandler
|
||||
# .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
# .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM1_CC_IRQHandler
|
||||
# .thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM2_IRQHandler
|
||||
# .thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM3_IRQHandler
|
||||
# .thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM4_IRQHandler
|
||||
# .thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C1_EV_IRQHandler
|
||||
# .thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C1_ER_IRQHandler
|
||||
# .thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C2_EV_IRQHandler
|
||||
# .thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C2_ER_IRQHandler
|
||||
# .thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
# .weak SPI1_IRQHandler
|
||||
# .thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak SPI2_IRQHandler
|
||||
# .thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak USART1_IRQHandler
|
||||
# .thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak USART2_IRQHandler
|
||||
# .thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak USART3_IRQHandler
|
||||
# .thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak EXTI15_10_IRQHandler
|
||||
# .thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
# .weak RTC_Alarm_IRQHandler
|
||||
# .thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_FS_WKUP_IRQHandler
|
||||
# .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM8_BRK_TIM12_IRQHandler
|
||||
# .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM8_UP_TIM13_IRQHandler
|
||||
# .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
# .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM8_CC_IRQHandler
|
||||
# .thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA1_Stream7_IRQHandler
|
||||
# .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
# .weak FSMC_IRQHandler
|
||||
# .thumb_set FSMC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak SDIO_IRQHandler
|
||||
# .thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM5_IRQHandler
|
||||
# .thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
# .weak SPI3_IRQHandler
|
||||
# .thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak UART4_IRQHandler
|
||||
# .thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
# .weak UART5_IRQHandler
|
||||
# .thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM6_DAC_IRQHandler
|
||||
# .thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
# .weak TIM7_IRQHandler
|
||||
# .thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream0_IRQHandler
|
||||
# .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream1_IRQHandler
|
||||
# .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream2_IRQHandler
|
||||
# .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream3_IRQHandler
|
||||
# .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream4_IRQHandler
|
||||
# .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
# .weak ETH_IRQHandler
|
||||
# .thumb_set ETH_IRQHandler,Default_Handler
|
||||
|
||||
# .weak ETH_WKUP_IRQHandler
|
||||
# .thumb_set ETH_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN2_TX_IRQHandler
|
||||
# .thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN2_RX0_IRQHandler
|
||||
# .thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN2_RX1_IRQHandler
|
||||
# .thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
||||
|
||||
# .weak CAN2_SCE_IRQHandler
|
||||
# .thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_FS_IRQHandler
|
||||
# .thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream5_IRQHandler
|
||||
# .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream6_IRQHandler
|
||||
# .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DMA2_Stream7_IRQHandler
|
||||
# .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
# .weak USART6_IRQHandler
|
||||
# .thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C3_EV_IRQHandler
|
||||
# .thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
# .weak I2C3_ER_IRQHandler
|
||||
# .thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_HS_EP1_OUT_IRQHandler
|
||||
# .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_HS_EP1_IN_IRQHandler
|
||||
# .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_HS_WKUP_IRQHandler
|
||||
# .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
# .weak OTG_HS_IRQHandler
|
||||
# .thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
# .weak DCMI_IRQHandler
|
||||
# .thumb_set DCMI_IRQHandler,Default_Handler
|
||||
|
||||
# .weak HASH_RNG_IRQHandler
|
||||
# .thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
# .weak FPU_IRQHandler
|
||||
# .thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
# /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,109 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file coreclock.c
|
||||
* @brief support SystemCoreClockUpdate function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-29
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: coreclock.c
|
||||
Description: support SystemCoreClockUpdate function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-29
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. take system_stm32f4xx.c for XiUOS
|
||||
*************************************************/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
uint32_t system_core_clock = 16000000;
|
||||
const uint8_t ahb_presc_table[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t apb_presc_table[8] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
void SystemCoreClockUpdate(void)
|
||||
{
|
||||
uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
|
||||
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp) {
|
||||
case 0x00:
|
||||
system_core_clock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04:
|
||||
system_core_clock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08:
|
||||
pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
|
||||
pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
|
||||
|
||||
if (pllsource != 0)
|
||||
pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
else
|
||||
pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
|
||||
|
||||
pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
|
||||
system_core_clock = pllvco/pllp;
|
||||
break;
|
||||
default:
|
||||
system_core_clock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
tmp = ahb_presc_table[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
|
||||
system_core_clock >>= tmp;
|
||||
}
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file interrupt.c
|
||||
* @brief support arm cortex-m4 interrupt function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-29
|
||||
*/
|
||||
|
||||
#include <xs_base.h>
|
||||
#include <xs_isr.h>
|
||||
#include <misc.h>
|
||||
#include <stm32f4xx.h>
|
||||
|
||||
extern void _svcall(uintptr_t* contex);
|
||||
|
||||
x_base __attribute__((naked)) DisableLocalInterrupt()
|
||||
{
|
||||
asm volatile ("MRS r0, PRIMASK");
|
||||
asm volatile ("CPSID I");
|
||||
asm volatile ("BX LR ");
|
||||
}
|
||||
|
||||
void __attribute__((naked)) EnableLocalInterrupt(x_base level)
|
||||
{
|
||||
asm volatile ("MSR PRIMASK, r0");
|
||||
asm volatile ("BX LR");
|
||||
}
|
||||
|
||||
int32 ArchEnableHwIrq(uint32 irq_num)
|
||||
{
|
||||
NVIC_InitTypeDef nvic_init;
|
||||
|
||||
nvic_init.NVIC_IRQChannel = irq_num;
|
||||
nvic_init.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
nvic_init.NVIC_IRQChannelSubPriority = 0;
|
||||
nvic_init.NVIC_IRQChannelCmd = ENABLE;
|
||||
|
||||
NVIC_Init(&nvic_init);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
int32 ArchDisableHwIrq(uint32 irq_num)
|
||||
{
|
||||
NVIC_InitTypeDef nvic_init;
|
||||
|
||||
nvic_init.NVIC_IRQChannel = irq_num;
|
||||
nvic_init.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
nvic_init.NVIC_IRQChannelSubPriority = 0;
|
||||
nvic_init.NVIC_IRQChannelCmd = DISABLE;
|
||||
|
||||
NVIC_Init(&nvic_init);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
extern void KTaskOsAssignAfterIrq(void *context);
|
||||
|
||||
void IsrEntry()
|
||||
{
|
||||
uint32 ipsr;
|
||||
|
||||
__asm__ volatile("MRS %0, IPSR" : "=r"(ipsr));
|
||||
|
||||
isrManager.done->incCounter();
|
||||
isrManager.done->handleIrq(ipsr);
|
||||
KTaskOsAssignAfterIrq(NONE);
|
||||
isrManager.done->decCounter();
|
||||
|
||||
}
|
||||
|
||||
uintptr_t *Svcall(unsigned int ipsr , uintptr_t* contex )
|
||||
{
|
||||
#ifdef TASK_ISOLATION
|
||||
_svcall(contex);
|
||||
#endif
|
||||
return contex;
|
||||
}
|
||||
|
|
@ -0,0 +1,171 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f407xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F407xx Devices vector table for GCC based toolchains.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file interrupt_vector.S
|
||||
* @brief derived from ST standard peripheral library
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: interrupt_vector.S
|
||||
Description: Interrupt Vectors
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-29
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. take startup_stm32f407xx.s for XiUOS
|
||||
*************************************************/
|
||||
|
||||
.globl InterruptVectors
|
||||
|
||||
/******************************************************************************
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type InterruptVectors, %object
|
||||
.size InterruptVectors, .-InterruptVectors
|
||||
|
||||
InterruptVectors:
|
||||
.word __stack_end__
|
||||
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFaultHandler
|
||||
.word MemFaultHandler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word IsrEntry
|
||||
.word SVC_Entry /* SVC */
|
||||
.word IsrEntry /* DebugMon */
|
||||
.word IsrEntry
|
||||
.word PendSV_Handler
|
||||
.word IsrEntry /* SysTick */
|
||||
|
||||
.word IsrEntry /* Window WatchDog */
|
||||
.word IsrEntry /* PVD through EXTI Line detection */
|
||||
.word IsrEntry /* Tamper and TimeStamps through the EXTI line */
|
||||
.word IsrEntry /* RTC Wakeup through the EXTI line */
|
||||
.word IsrEntry /* FLASH */
|
||||
.word IsrEntry /* RCC */
|
||||
.word IsrEntry /* EXTI Line0 */
|
||||
.word IsrEntry /* EXTI Line1 */
|
||||
.word IsrEntry /* EXTI Line2 */
|
||||
.word IsrEntry /* EXTI Line3 */
|
||||
.word IsrEntry /* EXTI Line4 */
|
||||
.word IsrEntry /* DMA1 Stream 0 */
|
||||
.word IsrEntry /* DMA1 Stream 1 */
|
||||
.word IsrEntry /* DMA1 Stream 2 */
|
||||
.word IsrEntry /* DMA1 Stream 3 */
|
||||
.word IsrEntry /* DMA1 Stream 4 */
|
||||
.word IsrEntry /* DMA1 Stream 5 */
|
||||
.word IsrEntry /* DMA1 Stream 6 */
|
||||
.word IsrEntry /* ADC1, ADC2 and ADC3s */
|
||||
.word IsrEntry /* CAN1 TX */
|
||||
.word IsrEntry /* CAN1 RX0 */
|
||||
.word IsrEntry /* CAN1 RX1 */
|
||||
.word IsrEntry /* CAN1 SCE */
|
||||
.word IsrEntry /* External Line[9:5]s */
|
||||
.word IsrEntry /* TIM1 Break and TIM9 */
|
||||
.word IsrEntry /* TIM1 Update and TIM10 */
|
||||
.word IsrEntry /* TIM1 Trigger and Commutation and TIM11 */
|
||||
.word IsrEntry /* TIM1 Capture Compare */
|
||||
.word IsrEntry /* TIM2 */
|
||||
.word IsrEntry /* TIM3 */
|
||||
.word IsrEntry /* TIM4 */
|
||||
.word IsrEntry /* I2C1 Event */
|
||||
.word IsrEntry /* I2C1 Error */
|
||||
.word IsrEntry /* I2C2 Event */
|
||||
.word IsrEntry /* I2C2 Error */
|
||||
.word IsrEntry /* SPI1 */
|
||||
.word IsrEntry /* SPI2 */
|
||||
.word IsrEntry /* USART1 */
|
||||
.word IsrEntry /* USART2 */
|
||||
.word IsrEntry /* USART3 */
|
||||
.word IsrEntry /* External Line[15:10]s */
|
||||
.word IsrEntry /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word IsrEntry /* USB OTG FS Wakeup through EXTI line */
|
||||
.word IsrEntry /* TIM8 Break and TIM12 */
|
||||
.word IsrEntry /* TIM8 Update and TIM13 */
|
||||
.word IsrEntry /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word IsrEntry /* TIM8 Capture Compare */
|
||||
.word IsrEntry /* DMA1 Stream7 */
|
||||
.word IsrEntry /* FSMC */
|
||||
.word IsrEntry /* SDIO */
|
||||
.word IsrEntry /* TIM5 */
|
||||
.word IsrEntry /* SPI3 */
|
||||
.word IsrEntry /* UART4 */
|
||||
.word IsrEntry /* UART5 */
|
||||
.word IsrEntry /* TIM6 and DAC1&2 underrun errors */
|
||||
.word IsrEntry /* TIM7 */
|
||||
.word IsrEntry /* DMA2 Stream 0 */
|
||||
.word IsrEntry /* DMA2 Stream 1 */
|
||||
.word IsrEntry /* DMA2 Stream 2 */
|
||||
.word IsrEntry /* DMA2 Stream 3 */
|
||||
.word IsrEntry /* DMA2 Stream 4 */
|
||||
.word IsrEntry /* Ethernet */
|
||||
.word IsrEntry /* Ethernet Wakeup through EXTI line */
|
||||
.word IsrEntry /* CAN2 TX */
|
||||
.word IsrEntry /* CAN2 RX0 */
|
||||
.word IsrEntry /* CAN2 RX1 */
|
||||
.word IsrEntry /* CAN2 SCE */
|
||||
.word IsrEntry /* USB OTG FS */
|
||||
.word IsrEntry /* DMA2 Stream 5 */
|
||||
.word IsrEntry /* DMA2 Stream 6 */
|
||||
.word IsrEntry /* DMA2 Stream 7 */
|
||||
.word IsrEntry /* USART6 */
|
||||
.word IsrEntry /* I2C3 event */
|
||||
.word IsrEntry /* I2C3 error */
|
||||
.word IsrEntry /* USB OTG HS End Point 1 Out */
|
||||
.word IsrEntry /* USB OTG HS End Point 1 In */
|
||||
.word IsrEntry /* USB OTG HS Wakeup through EXTI */
|
||||
.word IsrEntry /* USB OTG HS */
|
||||
.word IsrEntry /* DCMI */
|
||||
.word IsrEntry /* CRYP crypto */
|
||||
.word IsrEntry /* Hash and Rng */
|
||||
.word IsrEntry /* FPU */
|
||||
|
|
@ -0,0 +1,292 @@
|
|||
/****************************************************************************
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/**
|
||||
* @file kswitch.h
|
||||
* @brief risc-v ecall function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: kswitch.h
|
||||
Description: arm svc function
|
||||
Others: take incubator-nuttx arch/arm/include/armv7-m/syscall.h for references
|
||||
https://github.com/apache/incubator-nuttx/tree/master/arch/arm/include/armv7-m/syscall.h
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. Modify function name for a unified
|
||||
2. Add some functions when there is no system call
|
||||
*************************************************/
|
||||
#ifndef __XS_ARM_M4_KSWITCH_H__
|
||||
#define __XS_ARM_M4_KSWITCH_H__
|
||||
|
||||
#include <stdint.h>
|
||||
// #include <xs_service.h>
|
||||
#include "../../../kernel/include/xs_service.h"
|
||||
|
||||
#ifdef TASK_ISOLATION
|
||||
#define KERNEL_SWITCH 0x00
|
||||
|
||||
/****************************************************************************
|
||||
* kernel switch functions
|
||||
****************************************************************************/
|
||||
|
||||
/* SVC call with call number and no parameters */
|
||||
static inline unsigned long KSwitch0(unsigned int nbr)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
/* SVC call with call number and one parameter */
|
||||
static inline unsigned long KSwitch1(unsigned int nbr, unsigned long parm1)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
/* SVC call with call number and two parameters */
|
||||
static inline unsigned long KSwitch2(unsigned int nbr, unsigned long parm1,
|
||||
unsigned long parm2)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg2 __asm__("r2") = (long)(parm2);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1), "r"(reg2)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
|
||||
/* SVC call with call number and four parameters.
|
||||
*
|
||||
*/
|
||||
static inline unsigned long KSwitch3(unsigned int nbr, unsigned long parm1,
|
||||
unsigned long parm2, unsigned long parm3)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
register long reg2 __asm__("r2") = (long)(parm2);
|
||||
register long reg3 __asm__("r3") = (long)(parm3);
|
||||
|
||||
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1), "r"(reg2),
|
||||
"r"(reg3)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
static inline unsigned long KSwitch4(unsigned int nbr, unsigned long parm1,
|
||||
unsigned long parm2, unsigned long parm3,
|
||||
unsigned long parm4)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg4 __asm__("r4") = (long)(parm4);
|
||||
register long reg3 __asm__("r3") = (long)(parm3);
|
||||
register long reg2 __asm__("r2") = (long)(parm2);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1), "r"(reg2),
|
||||
"r"(reg3), "r"(reg4)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
/* SVC call with call number and five parameters.
|
||||
*
|
||||
*/
|
||||
static inline unsigned long KSwitch5(unsigned int nbr, unsigned long parm1,
|
||||
unsigned long parm2, unsigned long parm3,
|
||||
unsigned long parm4, unsigned long parm5)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg5 __asm__("r5") = (long)(parm5);
|
||||
register long reg4 __asm__("r4") = (long)(parm4);
|
||||
register long reg3 __asm__("r3") = (long)(parm3);
|
||||
register long reg2 __asm__("r2") = (long)(parm2);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1), "r"(reg2),
|
||||
"r"(reg3), "r"(reg4), "r"(reg5)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
|
||||
/* SVC call with call number and six parameters.
|
||||
*
|
||||
*/
|
||||
static inline unsigned long KSwitch6(unsigned int nbr, unsigned long parm1,
|
||||
unsigned long parm2, unsigned long parm3,
|
||||
unsigned long parm4, unsigned long parm5,
|
||||
unsigned long parm6)
|
||||
{
|
||||
register long reg0 __asm__("r0") = (long)(nbr);
|
||||
register long reg6 __asm__("r6") = (long)(parm6);
|
||||
register long reg5 __asm__("r5") = (long)(parm5);
|
||||
register long reg4 __asm__("r4") = (long)(parm4);
|
||||
register long reg3 __asm__("r3") = (long)(parm3);
|
||||
register long reg2 __asm__("r2") = (long)(parm2);
|
||||
register long reg1 __asm__("r1") = (long)(parm1);
|
||||
|
||||
__asm__ __volatile__
|
||||
(
|
||||
"svc %1"
|
||||
: "=r"(reg0)
|
||||
: "i"(KERNEL_SWITCH), "r"(reg0), "r"(reg1), "r"(reg2),
|
||||
"r"(reg3), "r"(reg4), "r"(reg5), "r"(reg6)
|
||||
: "memory"
|
||||
);
|
||||
|
||||
return reg0;
|
||||
}
|
||||
#else
|
||||
|
||||
static inline unsigned long KSwitch0(unsigned int knum)
|
||||
{
|
||||
uintptr_t param[1] = {0};
|
||||
uint8_t num = 0;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
static inline unsigned long KSwitch1(unsigned int knum, unsigned long arg1)
|
||||
{
|
||||
uintptr_t param[1] = {0};
|
||||
uint8_t num = 1;
|
||||
param[0] = arg1;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
|
||||
static inline unsigned long KSwitch2(unsigned int knum, unsigned long arg1,
|
||||
unsigned long arg2)
|
||||
{
|
||||
uintptr_t param[2] = {0};
|
||||
uint8_t num = 2;
|
||||
param[0] = arg1;
|
||||
param[1] = arg2;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
|
||||
static inline unsigned long KSwitch3(unsigned int knum, unsigned long arg1,
|
||||
unsigned long arg2, unsigned long arg3)
|
||||
{
|
||||
uintptr_t param[3] = {0};
|
||||
uint8_t num = 3;
|
||||
param[0] = arg1;
|
||||
param[1] = arg2;
|
||||
param[2] = arg3;
|
||||
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
static inline unsigned long KSwitch4(unsigned int knum, unsigned long arg1,
|
||||
unsigned long arg2, unsigned long arg3,
|
||||
unsigned long arg4)
|
||||
{
|
||||
uintptr_t param[4] = {0};
|
||||
uint8_t num = 4;
|
||||
param[0] = arg1;
|
||||
param[1] = arg2;
|
||||
param[2] = arg3;
|
||||
param[3] = arg4;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
static inline unsigned long KSwitch5(unsigned int knum, unsigned long arg1,
|
||||
unsigned long arg2, unsigned long arg3,
|
||||
unsigned long arg4, unsigned long arg5)
|
||||
{
|
||||
uintptr_t param[5] = {0};
|
||||
uint8_t num = 5;
|
||||
param[0] = arg1;
|
||||
param[1] = arg2;
|
||||
param[2] = arg3;
|
||||
param[3] = arg4;
|
||||
param[4] = arg5;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
static inline unsigned long KSwitch6(unsigned int knum, unsigned long arg1,
|
||||
unsigned long arg2, unsigned long arg3,
|
||||
unsigned long arg4, unsigned long arg5,
|
||||
unsigned long arg6)
|
||||
{
|
||||
uintptr_t param[6] = {0};
|
||||
uint8_t num = 6;
|
||||
param[0] = arg1;
|
||||
param[1] = arg2;
|
||||
param[2] = arg3;
|
||||
param[3] = arg4;
|
||||
param[4] = arg5;
|
||||
param[5] = arg6;
|
||||
(struct KernelService*)SERVICETABLE[knum].fun(knum, param, num);
|
||||
}
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
|
@ -0,0 +1,203 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "mpu.h"
|
||||
#include "board.h"
|
||||
#include <xs_isolation.h>
|
||||
|
||||
|
||||
void MpuEnable(uint32_t option)
|
||||
{
|
||||
MPU->CTRL = MPU_ENABLE | option;
|
||||
__DSB();
|
||||
__ISB();
|
||||
return ;
|
||||
}
|
||||
|
||||
void MpuDisable(void)
|
||||
{
|
||||
__DMB();
|
||||
MPU->CTRL = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
void MpuClearRegion(uint8_t region)
|
||||
{
|
||||
__DMB();
|
||||
MPU->RNR = region;
|
||||
MPU->RBAR = 0;
|
||||
MPU->RASR = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
void MpuClearAllRegion(void)
|
||||
{
|
||||
__DMB();
|
||||
for (int i = 0 ; i < 8 ; i++) {
|
||||
MPU->RNR = i;
|
||||
MPU->RBAR = 0;
|
||||
MPU->RASR = 0;
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
int8_t MpuAllocateRegion(void *task_mpu)
|
||||
{
|
||||
if(task_mpu == NONE)
|
||||
return -1;
|
||||
struct Mpu *mpu = (struct Mpu *)task_mpu;
|
||||
int8_t free_region;
|
||||
|
||||
if ( mpu->count < MPU_MAX_REGION_NUM - 1) {
|
||||
free_region = mpu->count;
|
||||
mpu->count ++;
|
||||
}
|
||||
else
|
||||
free_region = -1;
|
||||
|
||||
return free_region ;
|
||||
}
|
||||
|
||||
|
||||
size_t MpuLog2Ceil(size_t size)
|
||||
{
|
||||
size_t csize = 0;
|
||||
|
||||
while (size > 0) {
|
||||
size >>= 1;
|
||||
csize ++;
|
||||
}
|
||||
|
||||
return csize;
|
||||
}
|
||||
|
||||
int8_t MpuAddRegion(void *task_mpu, x_base addr , size_t size , uint8_t type)
|
||||
{
|
||||
|
||||
if(task_mpu == NONE)
|
||||
return -1;
|
||||
struct Mpu *mpu = (struct Mpu *)task_mpu;
|
||||
uint32_t l2size;
|
||||
int8_t region ;
|
||||
|
||||
region = MpuAllocateRegion(mpu);
|
||||
if (region < 0 ) {
|
||||
// KPrintf("MPU region full \n");
|
||||
return region;
|
||||
}
|
||||
uint32_t flag = 0;
|
||||
switch (type)
|
||||
{
|
||||
case REGION_TYPE_CODE:
|
||||
flag = MPU_RASR_AP_RO_RO | MPU_RASR_TEX_0 | MPU_RASR_C | MPU_RASR_S;
|
||||
break;
|
||||
case REGION_TYPE_DATA:
|
||||
flag = MPU_RASR_AP_RW_RW | MPU_RASR_TEX_0 | MPU_RASR_C | MPU_RASR_S ;
|
||||
break;
|
||||
case REGION_TYPE_BSS:
|
||||
flag = MPU_RASR_AP_RW_RW | MPU_RASR_TEX_0 | MPU_RASR_C | MPU_RASR_S ;
|
||||
break;
|
||||
case REGION_TYPE_HEAP:
|
||||
flag = MPU_RASR_AP_RW_RW | MPU_RASR_TEX_0 | MPU_RASR_C | MPU_RASR_S ;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
l2size = MpuLog2Ceil(size);
|
||||
addr = MPU_ALIGN(addr , 1 << l2size );
|
||||
mpu->region[region].config.rasr = flag |MPU_RASR_REGION_SIZE(l2size) | MPU_ENABLE;
|
||||
mpu->region[region].config.rbar = addr | MPU_RBAR_VALID | region ; //rbar must set region number
|
||||
|
||||
return region;
|
||||
}
|
||||
|
||||
x_err_t MpuInit(void **task_mpu)
|
||||
{
|
||||
|
||||
x_base addr_start;
|
||||
uint32_t addr_size;
|
||||
uint32_t flag;
|
||||
|
||||
if (MPU->TYPE == 0) {
|
||||
KPrintf("mpu not surport \n");
|
||||
return -1 ;
|
||||
}
|
||||
// KPrintf("mpu init ...\n");
|
||||
|
||||
struct Mpu *mpu;
|
||||
mpu = (struct Mpu *)malloc(sizeof(struct Mpu));
|
||||
memset(mpu, 0, sizeof(struct Mpu));
|
||||
|
||||
if (mpu == NONE)
|
||||
return -ENOMEMORY;
|
||||
|
||||
MpuDisable();
|
||||
MpuClearAllRegion(); //clear
|
||||
|
||||
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
|
||||
|
||||
//user flash
|
||||
addr_start = USER_TEXT_START;
|
||||
addr_size = USER_TEXT_END - USER_TEXT_START;
|
||||
MpuAddRegion(mpu, addr_start , addr_size, REGION_TYPE_CODE);
|
||||
|
||||
|
||||
//user sram
|
||||
addr_start = USER_SRAM_START;
|
||||
addr_size = USER_SRAM_END - USER_SRAM_START;
|
||||
MpuAddRegion(mpu, addr_start , addr_size, REGION_TYPE_HEAP);
|
||||
*task_mpu = mpu;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
void MpuFree(void *task_mpu)
|
||||
{
|
||||
if(task_mpu == NONE)
|
||||
return;
|
||||
MpuDisable();
|
||||
MpuClearAllRegion(); //clear
|
||||
x_free(task_mpu);
|
||||
}
|
||||
|
||||
void MpuLoad(void *task_mpu)
|
||||
{
|
||||
// KPrintf("MPU load .. \n");
|
||||
MpuDisable();
|
||||
MpuClearAllRegion(); //clear
|
||||
if(task_mpu == NONE)
|
||||
return;
|
||||
struct Mpu *mpu = (struct Mpu *)task_mpu;
|
||||
|
||||
uint8_t region = 0 ;
|
||||
|
||||
#if 0
|
||||
for ( region = 0 ; region <= mpu->count -1 ; region ++ ){
|
||||
KPrintf("region: %d\n",region);
|
||||
KPrintf("rasr 0x%08x \n",mpu->region[region].config.rasr);
|
||||
KPrintf("rbar 0x%08x \n",mpu->region[region].config.rbar);
|
||||
KPrintf("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
for ( region = 0 ; region <= mpu->count -1 ; region ++ ){
|
||||
MPU->RNR = region;
|
||||
MPU->RBAR = mpu->region[region].config.rbar;
|
||||
MPU->RASR = mpu->region[region].config.rasr;
|
||||
}
|
||||
__DSB();
|
||||
__ISB();
|
||||
MpuEnable(MPU_PRIVDEFENA);
|
||||
}
|
||||
|
|
@ -0,0 +1,97 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
#ifndef MPU_H
|
||||
#define MPU_H
|
||||
|
||||
#include <xs_base.h>
|
||||
#include <xs_klist.h>
|
||||
|
||||
|
||||
#define MPU_ALIGN(size, align) (((size)) & ~((align) - 1))
|
||||
|
||||
#define USER_TEXT_START (uintptr_t)( USERSPACE )
|
||||
#define USER_TEXT_END (uintptr_t)( USERSPACE->us_textend )
|
||||
#define USER_SRAM_START (uintptr_t)( USERSPACE->us_datastart )
|
||||
#define USER_SRAM_END (uintptr_t)( USER_MEMORY_END_ADDRESS )
|
||||
|
||||
|
||||
|
||||
#define MPU_MAX_REGION_NUM 8
|
||||
|
||||
|
||||
/* MPU Control Register Bit Definitions */
|
||||
#define MPU_ENABLE (1 << 0) /* Bit 0: Enable the MPU */
|
||||
#define MPU_HFNMIENA (1 << 1) /* Bit 1: Enable MPU during hard fault, NMI, and FAULTMAS */
|
||||
#define MPU_PRIVDEFENA (1 << 2) /* Bit 2: Enable privileged access to default memory map */
|
||||
|
||||
#define MPU_RBAR_VALID (1 << 4)
|
||||
|
||||
#define MPU_RASR_ENABLE (1 << 0) /* Bit 0: Region enable */
|
||||
#define MPU_RASR_REGION_SIZE(n) ((n-1) << 1)
|
||||
|
||||
#define MPU_RASR_AP_NO_NO (0 << 24) /* P:None U:None */
|
||||
#define MPU_RASR_AP_RW_NO (1 << 24) /* P:RW U:None */
|
||||
#define MPU_RASR_AP_RW_RO (2 << 24) /* P:RW U:RO */
|
||||
#define MPU_RASR_AP_RW_RW (3 << 24) /* P:RW U:RW */
|
||||
#define MPU_RASR_AP_RO_NO (5 << 24) /* P:RO U:None */
|
||||
#define MPU_RASR_AP_RO_RO (6 << 24) /* P:RO U:RO */
|
||||
|
||||
#define MPU_RASR_RASR_XN (1 << 28) /* Bit 28: Instruction access disable */
|
||||
|
||||
#define MPU_RASR_SRD_MASK (0xff << 8)
|
||||
#define MPU_RASR_SRD_0 (0x01 << 8)
|
||||
#define MPU_RASR_SRD_1 (0x02 << 8)
|
||||
#define MPU_RASR_SRD_2 (0x04 << 8)
|
||||
#define MPU_RASR_SRD_3 (0x08 << 8)
|
||||
#define MPU_RASR_SRD_4 (0x10 << 8)
|
||||
#define MPU_RASR_SRD_5 (0x20 << 8)
|
||||
#define MPU_RASR_SRD_6 (0x40 << 8)
|
||||
#define MPU_RASR_SRD_7 (0x80 << 8)
|
||||
|
||||
#define MPU_RASR_TEX_SHIFT (19) /* Bits 19-21: TEX Address Permission */
|
||||
#define MPU_RASR_TEX_MASK (7 << 19)
|
||||
#define MPU_RASR_TEX_0 (0 << 19) /* Strongly Ordered */
|
||||
#define MPU_RASR_TEX_1 (1 << 19) /* Normal */
|
||||
#define MPU_RASR_TEX_2 (2 << 19) /* Device */
|
||||
#define MPU_RASR_TEX_BB(bb) ((4|(bb)) << 19)
|
||||
|
||||
#define MPU_RASR_B (1 << 16) /* Bit 16: Bufferable */
|
||||
#define MPU_RASR_C (1 << 17) /* Bit 17: Cacheable */
|
||||
#define MPU_RASR_S (1 << 18) /* Bit 18: Shareable */
|
||||
|
||||
struct MpuConfig
|
||||
{
|
||||
uint32_t rasr;
|
||||
uint32_t rbar;
|
||||
};
|
||||
|
||||
struct MpuRegion
|
||||
{
|
||||
x_base start;
|
||||
x_base size;
|
||||
struct MpuConfig config;
|
||||
};
|
||||
|
||||
struct Mpu
|
||||
{
|
||||
|
||||
uint8_t count;
|
||||
struct MpuRegion region[MPU_MAX_REGION_NUM];
|
||||
};
|
||||
|
||||
|
||||
void MpuEnable( uint32_t option);
|
||||
void MpuDisable(void);
|
||||
x_err_t MpuInit(void **task_mpu);
|
||||
void MpuLoad(void *task_mpu);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#include <xsconfig.h>
|
||||
|
||||
.globl SVC_Entry
|
||||
.syntax unified
|
||||
.thumb
|
||||
.file "svc_entry.S"
|
||||
|
||||
.text
|
||||
.type SVC_Entry, %function
|
||||
.thumb_func
|
||||
SVC_Entry:
|
||||
MRS r3, PRIMASK
|
||||
CPSID I
|
||||
MRS r0, ipsr
|
||||
MRS r1, psp /* R1=The process stack pointer (PSP) */
|
||||
|
||||
STMDB r1!, {r3-r11} /* Save the remaining registers plus the SP/PRIMASK values */
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
MOV r2, #0x00
|
||||
TST lr, #0x10
|
||||
MOVEQ r2, #0x01
|
||||
STMFD r1!, {r2}
|
||||
#endif
|
||||
PUSH {lr}
|
||||
BL Svcall /* R0=IRQ, R1=register save (msp) */
|
||||
POP {lr}
|
||||
|
||||
MOV r1, r0
|
||||
|
||||
#ifdef TASK_ISOLATION
|
||||
PUSH {lr}
|
||||
BL GetTaskPrivilege
|
||||
POP {lr}
|
||||
#endif
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
LDMFD r1!, {r2}
|
||||
#endif
|
||||
|
||||
LDMIA r1!, {r3-r11} /* Recover R4-R11, FPU flag and PRIMASK*/
|
||||
|
||||
#if defined (__VFP_FP__) && !defined(__SOFTFP__)
|
||||
ORR lr, lr, #0x10
|
||||
CMP r2, #0
|
||||
BICNE lr, lr, #0x10
|
||||
#endif
|
||||
MSR psp, r1
|
||||
MRS r2, control
|
||||
|
||||
#ifdef TASK_ISOLATION
|
||||
CMP r0, #1
|
||||
BEQ unprivilege
|
||||
|
||||
privilege:
|
||||
BIC r2, r2, #0x01
|
||||
B exit
|
||||
|
||||
unprivilege:
|
||||
ORR r2, r2, #0x01
|
||||
#else
|
||||
BIC r2, r2, #0x01
|
||||
#endif
|
||||
|
||||
exit:
|
||||
MSR control, r2
|
||||
ORR lr, lr, #0x04
|
||||
MSR PRIMASK, r3
|
||||
BX lr
|
||||
|
|
@ -0,0 +1,92 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
#include <xs_base.h>
|
||||
#include <stdint.h>
|
||||
#include "svc_handle.h"
|
||||
#include <xs_service.h>
|
||||
#include <xs_ktask.h>
|
||||
|
||||
static void SvcDispatch(void) __attribute__ ((naked, no_instrument_function));
|
||||
static void SvcDispatch(void)
|
||||
{
|
||||
__asm__ __volatile__
|
||||
(
|
||||
" mov r12, sp\n"
|
||||
" sub r12, r12, #36\n"
|
||||
" and r12, r12, #7\n"
|
||||
" add r12, r12, #36\n"
|
||||
" sub sp, sp, r12\n"
|
||||
" str r0, [sp, #0]\n"
|
||||
" str r1, [sp, #4]\n"
|
||||
" str r2, [sp, #8]\n"
|
||||
" str r3, [sp, #12]\n"
|
||||
" str r4, [sp, #16]\n"
|
||||
" str r5, [sp, #20]\n"
|
||||
" str r6, [sp, #24]\n"
|
||||
" str lr, [sp, #28]\n"
|
||||
" str r12, [sp, #32]\n"
|
||||
" mov r0, sp\n"
|
||||
" ldr r12, =SvcHandle\n"
|
||||
" blx r12\n"
|
||||
" ldr lr, [sp, #28]\n"
|
||||
" ldr r2, [sp, #32]\n"
|
||||
" add sp, sp, r2\n"
|
||||
" svc 1"
|
||||
);
|
||||
}
|
||||
|
||||
|
||||
void _svcall(uintptr_t* contex)
|
||||
{
|
||||
uint32_t svc_number;
|
||||
KTaskDescriptorType tid;
|
||||
|
||||
tid = GetKTaskDescriptor();
|
||||
svc_number = ((char *)contex[REG_INT_PC ])[-2];
|
||||
switch (svc_number) {
|
||||
case 0: //svc handler
|
||||
tid->task_dync_sched_member.svc_return = contex[REG_INT_PC];
|
||||
tid->task_dync_sched_member.isolation_status = 1;
|
||||
contex[REG_INT_PC] = (uint32_t)SvcDispatch & ~1;
|
||||
break;
|
||||
case 1: // svc return
|
||||
contex[REG_INT_PC] = tid->task_dync_sched_member.svc_return;
|
||||
tid->task_dync_sched_member.isolation_status = 0;
|
||||
break;
|
||||
default:
|
||||
KPrintf("unsurport svc call number :%d\n",svc_number);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
uintptr_t SvcHandle(uintptr_t *sp)
|
||||
{
|
||||
uint32_t service_num = 0;
|
||||
service_num = ((uint32_t) sp[0]); //r0
|
||||
uint8_t param_num = g_service_table[service_num].param_num;
|
||||
uintptr_t *param = sp + 1;
|
||||
return g_service_table[service_num].fun(service_num,param,param_num) ;
|
||||
}
|
||||
|
||||
|
||||
uint32_t GetTaskPrivilege(void){
|
||||
uint32_t unprivileg = 0;
|
||||
struct TaskDescriptor *task = GetKTaskDescriptor();
|
||||
if (task->task_dync_sched_member.isolation_flag == 1 && task->task_dync_sched_member.isolation_status == 0) {
|
||||
unprivileg = 1;
|
||||
} else {
|
||||
unprivileg = 0;
|
||||
}
|
||||
|
||||
return unprivileg;
|
||||
}
|
||||
|
|
@ -0,0 +1,99 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f4xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file system_init.c
|
||||
* @brief support SystemInit function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-29
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: system_init.c
|
||||
Description: support SystemInit function
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-29
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. take system_stm32f4xx.c for XiUOS
|
||||
*************************************************/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
#define VECT_TAB_OFFSET 0x00
|
||||
|
||||
void SystemInit(void)
|
||||
{
|
||||
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));
|
||||
|
||||
RCC->CR |= (uint32_t)0x00000001;
|
||||
RCC->CFGR = 0x00000000;
|
||||
RCC->CR &= (uint32_t)0xFEF6FFFF;
|
||||
RCC->PLLCFGR = 0x24003010;
|
||||
RCC->CR &= (uint32_t)0xFFFBFFFF;
|
||||
RCC->CIR = 0x00000000;
|
||||
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET;
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET;
|
||||
#endif
|
||||
}
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := Libraries
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := Libraries
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
SRC_DIR := Libraries
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_STM32F407_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "stm32f407-st-discovery feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "stm32f407-st-discovery feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "stm32f407-st-discovery feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "//XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4 emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
config __STACKSIZE__
|
||||
int "stack size for interrupt"
|
||||
default 4096
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define stm32f407-st-discovery-board init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.h
|
||||
Description: define stm32f407-st-discovery-board board init function and struct
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. define stm32f407-st-discovery-board InitBoardHardware
|
||||
2. define stm32f407-st-discovery-board data and bss struct
|
||||
*************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __stack_end__;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define SURPORT_MPU
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__stack_end__)
|
||||
#define MEM_OFFSET 128
|
||||
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
|
||||
|
||||
|
||||
#ifdef SEPARATE_COMPILE
|
||||
typedef int (*main_t)(int argc, char *argv[]);
|
||||
typedef void (*exit_t)(void);
|
||||
struct userspace_s
|
||||
{
|
||||
main_t us_entrypoint;
|
||||
exit_t us_taskquit;
|
||||
uintptr_t us_textstart;
|
||||
uintptr_t us_textend;
|
||||
uintptr_t us_datasource;
|
||||
uintptr_t us_datastart;
|
||||
uintptr_t us_dataend;
|
||||
uintptr_t us_bssstart;
|
||||
uintptr_t us_bssend;
|
||||
uintptr_t us_heapend;
|
||||
};
|
||||
#define USERSPACE (( struct userspace_s *)(0x08080000))
|
||||
|
||||
#ifndef SERVICE_TABLE_ADDRESS
|
||||
#define SERVICE_TABLE_ADDRESS (0x20000000)
|
||||
#endif
|
||||
|
||||
#define USER_SRAM_SIZE 64
|
||||
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
|
||||
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
|
||||
#endif
|
||||
|
||||
void InitBoardHardware(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
InitHwUsart();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
InitHwUsart();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
InitHwUsart();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
InitHwUsart();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define stm32f407-st-discovery-board init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.h
|
||||
Description: define stm32f407-st-discovery-board board init function and struct
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. define stm32f407-st-discovery-board InitBoardHardware
|
||||
2. define stm32f407-st-discovery-board data and bss struct
|
||||
*************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __stack_end__;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define SURPORT_MPU
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__stack_end__)
|
||||
#define MEM_OFFSET 128
|
||||
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
|
||||
|
||||
|
||||
#ifdef SEPARATE_COMPILE
|
||||
typedef int (*main_t)(int argc, char *argv[]);
|
||||
typedef void (*exit_t)(void);
|
||||
struct userspace_s
|
||||
{
|
||||
main_t us_entrypoint;
|
||||
exit_t us_taskquit;
|
||||
uintptr_t us_textstart;
|
||||
uintptr_t us_textend;
|
||||
uintptr_t us_datasource;
|
||||
uintptr_t us_datastart;
|
||||
uintptr_t us_dataend;
|
||||
uintptr_t us_bssstart;
|
||||
uintptr_t us_bssend;
|
||||
uintptr_t us_heapend;
|
||||
};
|
||||
#define USERSPACE (( struct userspace_s *)(0x08080000))
|
||||
|
||||
#ifndef SERVICE_TABLE_ADDRESS
|
||||
#define SERVICE_TABLE_ADDRESS (0x20000000)
|
||||
#endif
|
||||
|
||||
#define USER_SRAM_SIZE 64
|
||||
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
|
||||
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
|
||||
#endif
|
||||
|
||||
void InitBoardHardware(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support stm32f407-st-discovery-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support stm32f407-st-discovery-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export USING_NEWLIB =1
|
||||
export USING_VFS = 1
|
||||
export USING_SPI = 1
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_stm32f407-st-discovery.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H
|
||||
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usart.h
|
||||
* @brief define stm32f407-st-discovery-board usart function and struct
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_USART_H
|
||||
#define CONNECT_USART_H
|
||||
|
||||
#include <device.h>
|
||||
#include "hardware_usart.h"
|
||||
#include "hardware_dma.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define KERNEL_CONSOLE_BUS_NAME SERIAL_BUS_NAME_1
|
||||
#define KERNEL_CONSOLE_DRV_NAME SERIAL_DRV_NAME_1
|
||||
#define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
|
||||
|
||||
struct UsartHwCfg
|
||||
{
|
||||
USART_TypeDef *uart_device;
|
||||
IRQn_Type irq;
|
||||
};
|
||||
|
||||
struct Stm32Usart
|
||||
{
|
||||
struct Stm32UsartDma
|
||||
{
|
||||
DMA_Stream_TypeDef *RxStream;
|
||||
uint32 RxCh;
|
||||
uint32 RxFlag;
|
||||
uint8 RxIrqCh;
|
||||
x_size_t SettingRecvLen;
|
||||
x_size_t LastRecvIndex;
|
||||
} dma;
|
||||
|
||||
struct SerialBus serial_bus;
|
||||
};
|
||||
|
||||
int Stm32HwUsartInit(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usart.h
|
||||
* @brief define stm32f407-st-discovery-board usart function and struct
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
#ifndef CONNECT_USART_H
|
||||
#define CONNECT_USART_H
|
||||
|
||||
#include <device.h>
|
||||
#include "hardware_usart.h"
|
||||
#include "hardware_dma.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define KERNEL_CONSOLE_BUS_NAME SERIAL_BUS_NAME_1
|
||||
#define KERNEL_CONSOLE_DRV_NAME SERIAL_DRV_NAME_1
|
||||
#define KERNEL_CONSOLE_DEVICE_NAME SERIAL_1_DEVICE_NAME_0
|
||||
|
||||
struct UsartHwCfg
|
||||
{
|
||||
USART_TypeDef *uart_device;
|
||||
IRQn_Type irq;
|
||||
};
|
||||
|
||||
struct Stm32Usart
|
||||
{
|
||||
struct Stm32UsartDma
|
||||
{
|
||||
DMA_Stream_TypeDef *RxStream;
|
||||
uint32 RxCh;
|
||||
uint32 RxFlag;
|
||||
uint8 RxIrqCh;
|
||||
x_size_t SettingRecvLen;
|
||||
x_size_t LastRecvIndex;
|
||||
} dma;
|
||||
|
||||
struct SerialBus serial_bus;
|
||||
};
|
||||
|
||||
int InitHwUsart(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,858 @@
|
|||
/*
|
||||
* Copyright (c) 2020 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usart.c
|
||||
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_uart.c
|
||||
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
|
||||
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
|
||||
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board usart configure, write and read
|
||||
2. support stm32f407-st-discovery-board usart bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "board.h"
|
||||
#include "misc.h"
|
||||
#include "connect_usart.h"
|
||||
#include "hardware_gpio.h"
|
||||
#include "hardware_rcc.h"
|
||||
|
||||
/* UART GPIO define. */
|
||||
#define UART1_GPIO_TX GPIO_Pin_6
|
||||
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
|
||||
#define UART1_GPIO_RX GPIO_Pin_7
|
||||
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
|
||||
#define UART1_GPIO GPIOB
|
||||
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
|
||||
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
|
||||
|
||||
#define UART2_GPIO_TX GPIO_Pin_2
|
||||
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART2_GPIO_RX GPIO_Pin_3
|
||||
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
|
||||
#define UART2_GPIO GPIOA
|
||||
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
|
||||
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
|
||||
|
||||
#define UART3_GPIO_TX GPIO_Pin_8
|
||||
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
|
||||
#define UART3_GPIO_RX GPIO_Pin_9
|
||||
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
|
||||
#define UART3_GPIO GPIOD
|
||||
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
|
||||
|
||||
#define UART4_GPIO_TX GPIO_Pin_10
|
||||
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
|
||||
#define UART4_GPIO_RX GPIO_Pin_11
|
||||
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
|
||||
#define UART4_GPIO GPIOC
|
||||
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
|
||||
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
|
||||
|
||||
#define UART5_GPIO_TX GPIO_Pin_12
|
||||
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
|
||||
#define UART5_GPIO_RX GPIO_Pin_2
|
||||
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART5_TX GPIOC
|
||||
#define UART5_RX GPIOD
|
||||
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
|
||||
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
|
||||
|
||||
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
|
||||
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
|
||||
|
||||
static void RCCConfiguration(void)
|
||||
{
|
||||
#ifdef BSP_USING_USART1
|
||||
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void GPIOConfiguration(void)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_initstructure;
|
||||
|
||||
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
|
||||
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
|
||||
GPIO_Init(UART1_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
|
||||
GPIO_Init(UART2_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
|
||||
GPIO_Init(UART3_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
|
||||
GPIO_Init(UART4_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_TX, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_RX, &gpio_initstructure);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(IRQn_Type irq)
|
||||
{
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = irq;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
|
||||
{
|
||||
DMA_InitTypeDef DMA_InitStructure;
|
||||
|
||||
dma->SettingRecvLen = SettingRecvLen;
|
||||
DMA_DeInit(dma->RxStream);
|
||||
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
|
||||
DMA_InitStructure.DMA_Channel = dma->RxCh;
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
|
||||
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
|
||||
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
||||
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
|
||||
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
|
||||
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
|
||||
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
|
||||
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
|
||||
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
|
||||
DMA_Init(dma->RxStream, &DMA_InitStructure);
|
||||
}
|
||||
|
||||
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
|
||||
{
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
|
||||
|
||||
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
|
||||
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
|
||||
DMA_Cmd(dma->RxStream, ENABLE);
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
|
||||
{
|
||||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (configure_info->private_data) {
|
||||
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
|
||||
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
|
||||
}
|
||||
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
|
||||
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
|
||||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
|
||||
|
||||
switch (serial_operation_cmd)
|
||||
{
|
||||
case OPER_CLR_INT:
|
||||
UART_DISABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
|
||||
break;
|
||||
case OPER_SET_INT:
|
||||
UART_ENABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
|
||||
break;
|
||||
case OPER_CONFIG :
|
||||
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
|
||||
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
|
||||
serial_hw_cfg->uart_device->DR = c;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
int ch = -1;
|
||||
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
|
||||
ch = serial_hw_cfg->uart_device->DR & 0xff;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
|
||||
{
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
|
||||
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = recv_total_index;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
USART_ReceiveData(uart_device);
|
||||
}
|
||||
|
||||
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = 0;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
}
|
||||
}
|
||||
|
||||
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
|
||||
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
|
||||
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
|
||||
}
|
||||
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
|
||||
USART_ReceiveData(serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
struct Stm32Usart serial_1;
|
||||
struct SerialDriver serial_driver_1;
|
||||
struct SerialHardwareDevice serial_device_1;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_1 =
|
||||
{
|
||||
DMA2_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA2_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART1_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
|
||||
|
||||
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
struct Stm32Usart serial_2;
|
||||
struct SerialDriver serial_driver_2;
|
||||
struct SerialHardwareDevice serial_device_2;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_2 =
|
||||
{
|
||||
DMA1_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA1_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
struct Stm32Usart serial_3;
|
||||
struct SerialDriver serial_driver_3;
|
||||
struct SerialHardwareDevice serial_device_3;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_3 =
|
||||
{
|
||||
DMA1_Stream1,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF1,
|
||||
DMA1_Stream1_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
struct Stm32Usart serial_4;
|
||||
struct SerialDriver serial_driver_4;
|
||||
struct SerialHardwareDevice serial_device_4;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_4 =
|
||||
{
|
||||
DMA1_Stream2,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF2,
|
||||
DMA1_Stream2_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART4_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
struct Stm32Usart serial_5;
|
||||
struct SerialDriver serial_driver_5;
|
||||
struct SerialHardwareDevice serial_device_5;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_5 =
|
||||
{
|
||||
DMA1_Stream0,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF0,
|
||||
DMA1_Stream0_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART5_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
int serial_operation_cmd;
|
||||
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = Stm32SerialInit(serial_drv, configure_info);
|
||||
break;
|
||||
case OPE_CFG:
|
||||
serial_operation_cmd = *(int *)configure_info->private_data;
|
||||
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct SerialDataCfg data_cfg_init =
|
||||
{
|
||||
.serial_baud_rate = BAUD_RATE_115200,
|
||||
.serial_data_bits = DATA_BITS_8,
|
||||
.serial_stop_bits = STOP_BITS_1,
|
||||
.serial_parity_mode = PARITY_NONE,
|
||||
.serial_bit_order = BIT_ORDER_LSB,
|
||||
.serial_invert_mode = NRZ_NORMAL,
|
||||
.serial_buffer_size = SERIAL_RB_BUFSZ,
|
||||
};
|
||||
|
||||
/*manage the serial device operations*/
|
||||
static const struct SerialDrvDone drv_done =
|
||||
{
|
||||
.init = Stm32SerialInit,
|
||||
.configure = Stm32SerialConfigure,
|
||||
};
|
||||
|
||||
/*manage the serial device hal operations*/
|
||||
static struct SerialHwDevDone hwdev_done =
|
||||
{
|
||||
.put_char = Stm32SerialPutchar,
|
||||
.get_char = Stm32SerialGetchar,
|
||||
};
|
||||
|
||||
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the serial bus */
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the serial device to the serial bus*/
|
||||
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int InitHwUsart(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
RCCConfiguration();
|
||||
GPIOConfiguration();
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
static struct SerialCfgParam serial_cfg_1;
|
||||
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_1;
|
||||
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_1;
|
||||
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_1.dma = usart_dma_1;
|
||||
|
||||
serial_driver_1.drv_done = &drv_done;
|
||||
serial_driver_1.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_1.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_1.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_1.uart_device = USART1;
|
||||
serial_hw_cfg_1.irq = USART1_IRQn;
|
||||
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
|
||||
serial_driver_1.private_data = (void *)&serial_cfg_1;
|
||||
|
||||
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
static struct SerialCfgParam serial_cfg_2;
|
||||
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_2;
|
||||
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_2;
|
||||
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_2.dma = usart_dma_2;
|
||||
|
||||
serial_driver_2.drv_done = &drv_done;
|
||||
serial_driver_2.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_2.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_2.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_2.uart_device = USART2;
|
||||
serial_hw_cfg_2.irq = USART2_IRQn;
|
||||
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
|
||||
serial_driver_2.private_data = (void *)&serial_cfg_2;
|
||||
|
||||
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
static struct SerialCfgParam serial_cfg_3;
|
||||
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_3;
|
||||
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_3;
|
||||
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_3.dma = usart_dma_3;
|
||||
|
||||
serial_driver_3.drv_done = &drv_done;
|
||||
serial_driver_3.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_3.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_3.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_3.uart_device = USART3;
|
||||
serial_hw_cfg_3.irq = USART3_IRQn;
|
||||
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
|
||||
serial_driver_3.private_data = (void *)&serial_cfg_3;
|
||||
|
||||
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
static struct SerialCfgParam serial_cfg_4;
|
||||
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_4;
|
||||
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_4;
|
||||
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_4.dma = uart_dma_4;
|
||||
|
||||
serial_driver_4.drv_done = &drv_done;
|
||||
serial_driver_4.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_4.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_4.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_4.uart_device = UART4;
|
||||
serial_hw_cfg_4.irq = UART4_IRQn;
|
||||
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
|
||||
serial_driver_4.private_data = (void *)&serial_cfg_4;
|
||||
|
||||
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
static struct SerialCfgParam serial_cfg_5;
|
||||
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_5;
|
||||
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_5;
|
||||
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_5.dma = uart_dma_5;
|
||||
|
||||
serial_driver_5.drv_done = &drv_done;
|
||||
serial_driver_5.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_5.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_5.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_5.uart_device = UART5;
|
||||
serial_hw_cfg_5.irq = UART5_IRQn;
|
||||
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
|
||||
serial_driver_5.private_data = (void *)&serial_cfg_5;
|
||||
|
||||
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,858 @@
|
|||
/*
|
||||
* Copyright (c) 2020 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usart.c
|
||||
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_uart.c
|
||||
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
|
||||
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
|
||||
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board usart configure, write and read
|
||||
2. support stm32f407-st-discovery-board usart bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "board.h"
|
||||
#include "misc.h"
|
||||
#include "connect_usart.h"
|
||||
#include "hardware_gpio.h"
|
||||
#include "hardware_rcc.h"
|
||||
|
||||
/* UART GPIO define. */
|
||||
#define UART1_GPIO_TX GPIO_Pin_6
|
||||
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
|
||||
#define UART1_GPIO_RX GPIO_Pin_7
|
||||
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
|
||||
#define UART1_GPIO GPIOB
|
||||
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
|
||||
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
|
||||
|
||||
#define UART2_GPIO_TX GPIO_Pin_2
|
||||
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART2_GPIO_RX GPIO_Pin_3
|
||||
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
|
||||
#define UART2_GPIO GPIOA
|
||||
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
|
||||
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
|
||||
|
||||
#define UART3_GPIO_TX GPIO_Pin_8
|
||||
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
|
||||
#define UART3_GPIO_RX GPIO_Pin_9
|
||||
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
|
||||
#define UART3_GPIO GPIOD
|
||||
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
|
||||
|
||||
#define UART4_GPIO_TX GPIO_Pin_10
|
||||
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
|
||||
#define UART4_GPIO_RX GPIO_Pin_11
|
||||
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
|
||||
#define UART4_GPIO GPIOC
|
||||
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
|
||||
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
|
||||
|
||||
#define UART5_GPIO_TX GPIO_Pin_12
|
||||
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
|
||||
#define UART5_GPIO_RX GPIO_Pin_2
|
||||
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART5_TX GPIOC
|
||||
#define UART5_RX GPIOD
|
||||
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
|
||||
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
|
||||
|
||||
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
|
||||
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
|
||||
|
||||
static void RCCConfiguration(void)
|
||||
{
|
||||
#ifdef BSP_USING_USART1
|
||||
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void GPIOConfiguration(void)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_initstructure;
|
||||
|
||||
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
|
||||
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
|
||||
GPIO_Init(UART1_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
|
||||
GPIO_Init(UART2_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
|
||||
GPIO_Init(UART3_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
|
||||
GPIO_Init(UART4_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_TX, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_RX, &gpio_initstructure);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(IRQn_Type irq)
|
||||
{
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = irq;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
|
||||
{
|
||||
DMA_InitTypeDef DMA_InitStructure;
|
||||
|
||||
dma->SettingRecvLen = SettingRecvLen;
|
||||
DMA_DeInit(dma->RxStream);
|
||||
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
|
||||
DMA_InitStructure.DMA_Channel = dma->RxCh;
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
|
||||
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
|
||||
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
||||
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
|
||||
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
|
||||
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
|
||||
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
|
||||
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
|
||||
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
|
||||
DMA_Init(dma->RxStream, &DMA_InitStructure);
|
||||
}
|
||||
|
||||
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
|
||||
{
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
|
||||
|
||||
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
|
||||
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
|
||||
DMA_Cmd(dma->RxStream, ENABLE);
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
|
||||
{
|
||||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (configure_info->private_data) {
|
||||
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
|
||||
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
|
||||
}
|
||||
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
|
||||
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
|
||||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
|
||||
|
||||
switch (serial_operation_cmd)
|
||||
{
|
||||
case OPER_CLR_INT:
|
||||
UART_DISABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
|
||||
break;
|
||||
case OPER_SET_INT:
|
||||
UART_ENABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
|
||||
break;
|
||||
case OPER_CONFIG :
|
||||
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
|
||||
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
|
||||
serial_hw_cfg->uart_device->DR = c;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
int ch = -1;
|
||||
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
|
||||
ch = serial_hw_cfg->uart_device->DR & 0xff;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
|
||||
{
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
|
||||
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = recv_total_index;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
USART_ReceiveData(uart_device);
|
||||
}
|
||||
|
||||
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = 0;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
}
|
||||
}
|
||||
|
||||
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
|
||||
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
|
||||
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
|
||||
}
|
||||
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
|
||||
USART_ReceiveData(serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
struct Stm32Usart serial_1;
|
||||
struct SerialDriver serial_driver_1;
|
||||
struct SerialHardwareDevice serial_device_1;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_1 =
|
||||
{
|
||||
DMA2_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA2_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART1_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
|
||||
|
||||
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
struct Stm32Usart serial_2;
|
||||
struct SerialDriver serial_driver_2;
|
||||
struct SerialHardwareDevice serial_device_2;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_2 =
|
||||
{
|
||||
DMA1_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA1_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
struct Stm32Usart serial_3;
|
||||
struct SerialDriver serial_driver_3;
|
||||
struct SerialHardwareDevice serial_device_3;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_3 =
|
||||
{
|
||||
DMA1_Stream1,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF1,
|
||||
DMA1_Stream1_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
struct Stm32Usart serial_4;
|
||||
struct SerialDriver serial_driver_4;
|
||||
struct SerialHardwareDevice serial_device_4;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_4 =
|
||||
{
|
||||
DMA1_Stream2,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF2,
|
||||
DMA1_Stream2_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART4_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
struct Stm32Usart serial_5;
|
||||
struct SerialDriver serial_driver_5;
|
||||
struct SerialHardwareDevice serial_device_5;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_5 =
|
||||
{
|
||||
DMA1_Stream0,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF0,
|
||||
DMA1_Stream0_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART5_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
int serial_operation_cmd;
|
||||
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = Stm32SerialInit(serial_drv, configure_info);
|
||||
break;
|
||||
case OPE_CFG:
|
||||
serial_operation_cmd = *(int *)configure_info->private_data;
|
||||
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct SerialDataCfg data_cfg_init =
|
||||
{
|
||||
.serial_baud_rate = BAUD_RATE_115200,
|
||||
.serial_data_bits = DATA_BITS_8,
|
||||
.serial_stop_bits = STOP_BITS_1,
|
||||
.serial_parity_mode = PARITY_NONE,
|
||||
.serial_bit_order = BIT_ORDER_LSB,
|
||||
.serial_invert_mode = NRZ_NORMAL,
|
||||
.serial_buffer_size = SERIAL_RB_BUFSZ,
|
||||
};
|
||||
|
||||
/*manage the serial device operations*/
|
||||
static const struct SerialDrvDone drv_done =
|
||||
{
|
||||
.init = Stm32SerialInit,
|
||||
.configure = Stm32SerialConfigure,
|
||||
};
|
||||
|
||||
/*manage the serial device hal operations*/
|
||||
static struct SerialHwDevDone hwdev_done =
|
||||
{
|
||||
.put_char = Stm32SerialPutchar,
|
||||
.get_char = Stm32SerialGetchar,
|
||||
};
|
||||
|
||||
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the serial bus */
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the serial device to the serial bus*/
|
||||
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int InitHwUsart(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
RCCConfiguration();
|
||||
GPIOConfiguration();
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
static struct SerialCfgParam serial_cfg_1;
|
||||
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_1;
|
||||
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_1;
|
||||
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_1.dma = usart_dma_1;
|
||||
|
||||
serial_driver_1.drv_done = &drv_done;
|
||||
serial_driver_1.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_1.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_1.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_1.uart_device = USART1;
|
||||
serial_hw_cfg_1.irq = USART1_IRQn;
|
||||
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
|
||||
serial_driver_1.private_data = (void *)&serial_cfg_1;
|
||||
|
||||
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
static struct SerialCfgParam serial_cfg_2;
|
||||
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_2;
|
||||
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_2;
|
||||
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_2.dma = usart_dma_2;
|
||||
|
||||
serial_driver_2.drv_done = &drv_done;
|
||||
serial_driver_2.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_2.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_2.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_2.uart_device = USART2;
|
||||
serial_hw_cfg_2.irq = USART2_IRQn;
|
||||
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
|
||||
serial_driver_2.private_data = (void *)&serial_cfg_2;
|
||||
|
||||
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
static struct SerialCfgParam serial_cfg_3;
|
||||
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_3;
|
||||
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_3;
|
||||
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_3.dma = usart_dma_3;
|
||||
|
||||
serial_driver_3.drv_done = &drv_done;
|
||||
serial_driver_3.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_3.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_3.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_3.uart_device = USART3;
|
||||
serial_hw_cfg_3.irq = USART3_IRQn;
|
||||
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
|
||||
serial_driver_3.private_data = (void *)&serial_cfg_3;
|
||||
|
||||
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
static struct SerialCfgParam serial_cfg_4;
|
||||
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_4;
|
||||
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_4;
|
||||
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_4.dma = uart_dma_4;
|
||||
|
||||
serial_driver_4.drv_done = &drv_done;
|
||||
serial_driver_4.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_4.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_4.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_4.uart_device = UART4;
|
||||
serial_hw_cfg_4.irq = UART4_IRQn;
|
||||
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
|
||||
serial_driver_4.private_data = (void *)&serial_cfg_4;
|
||||
|
||||
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
static struct SerialCfgParam serial_cfg_5;
|
||||
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_5;
|
||||
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_5;
|
||||
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_5.dma = uart_dma_5;
|
||||
|
||||
serial_driver_5.drv_done = &drv_done;
|
||||
serial_driver_5.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_5.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_5.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_5.uart_device = UART5;
|
||||
serial_hw_cfg_5.irq = UART5_IRQn;
|
||||
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
|
||||
serial_driver_5.private_data = (void *)&serial_cfg_5;
|
||||
|
||||
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,858 @@
|
|||
/*
|
||||
* Copyright (c) 2020 RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file connect_usart.c
|
||||
* @brief support stm32f407-st-discovery-board usart function and register to bus framework
|
||||
* @version 1.0
|
||||
* @author AIIT XUOS Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: connect_uart.c
|
||||
Description: support stm32f407-st-discovery-board usart configure and uart bus register function
|
||||
Others: take RT-Thread v4.0.2/bsp/stm32/libraries/HAL_Drivers/drv_usart.c for references
|
||||
https://github.com/RT-Thread/rt-thread/tree/v4.0.2
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support stm32f407-st-discovery-board usart configure, write and read
|
||||
2. support stm32f407-st-discovery-board usart bus device and driver register
|
||||
*************************************************/
|
||||
|
||||
#include "stm32f4xx.h"
|
||||
#include "board.h"
|
||||
#include "misc.h"
|
||||
#include "connect_usart.h"
|
||||
#include "hardware_gpio.h"
|
||||
#include "hardware_rcc.h"
|
||||
|
||||
/* UART GPIO define. */
|
||||
#define UART1_GPIO_TX GPIO_Pin_6
|
||||
#define UART1_TX_PIN_SOURCE GPIO_PinSource6
|
||||
#define UART1_GPIO_RX GPIO_Pin_7
|
||||
#define UART1_RX_PIN_SOURCE GPIO_PinSource7
|
||||
#define UART1_GPIO GPIOB
|
||||
#define UART1_GPIO_RCC RCC_AHB1Periph_GPIOB
|
||||
#define RCC_APBPeriph_UART1 RCC_APB2Periph_USART1
|
||||
|
||||
#define UART2_GPIO_TX GPIO_Pin_2
|
||||
#define UART2_TX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART2_GPIO_RX GPIO_Pin_3
|
||||
#define UART2_RX_PIN_SOURCE GPIO_PinSource3
|
||||
#define UART2_GPIO GPIOA
|
||||
#define UART2_GPIO_RCC RCC_AHB1Periph_GPIOA
|
||||
#define RCC_APBPeriph_UART2 RCC_APB1Periph_USART2
|
||||
|
||||
#define UART3_GPIO_TX GPIO_Pin_8
|
||||
#define UART3_TX_PIN_SOURCE GPIO_PinSource8
|
||||
#define UART3_GPIO_RX GPIO_Pin_9
|
||||
#define UART3_RX_PIN_SOURCE GPIO_PinSource9
|
||||
#define UART3_GPIO GPIOD
|
||||
#define UART3_GPIO_RCC RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART3 RCC_APB1Periph_USART3
|
||||
|
||||
#define UART4_GPIO_TX GPIO_Pin_10
|
||||
#define UART4_TX_PIN_SOURCE GPIO_PinSource10
|
||||
#define UART4_GPIO_RX GPIO_Pin_11
|
||||
#define UART4_RX_PIN_SOURCE GPIO_PinSource11
|
||||
#define UART4_GPIO GPIOC
|
||||
#define UART4_GPIO_RCC RCC_AHB1Periph_GPIOC
|
||||
#define RCC_APBPeriph_UART4 RCC_APB1Periph_UART4
|
||||
|
||||
#define UART5_GPIO_TX GPIO_Pin_12
|
||||
#define UART5_TX_PIN_SOURCE GPIO_PinSource12
|
||||
#define UART5_GPIO_RX GPIO_Pin_2
|
||||
#define UART5_RX_PIN_SOURCE GPIO_PinSource2
|
||||
#define UART5_TX GPIOC
|
||||
#define UART5_RX GPIOD
|
||||
#define UART5_GPIO_RCC_TX RCC_AHB1Periph_GPIOC
|
||||
#define UART5_GPIO_RCC_RX RCC_AHB1Periph_GPIOD
|
||||
#define RCC_APBPeriph_UART5 RCC_APB1Periph_UART5
|
||||
|
||||
#define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n))
|
||||
#define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n))
|
||||
|
||||
static void RCCConfiguration(void)
|
||||
{
|
||||
#ifdef BSP_USING_USART1
|
||||
RCC_AHB1PeriphClockCmd(UART1_GPIO_RCC, ENABLE);
|
||||
RCC_APB2PeriphClockCmd(RCC_APBPeriph_UART1, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
RCC_AHB1PeriphClockCmd(UART2_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART2, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
RCC_AHB1PeriphClockCmd(UART3_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART3, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
RCC_AHB1PeriphClockCmd(UART4_GPIO_RCC, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART4, ENABLE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
RCC_AHB1PeriphClockCmd(UART5_GPIO_RCC_TX | UART5_GPIO_RCC_RX, ENABLE);
|
||||
RCC_APB1PeriphClockCmd(RCC_APBPeriph_UART5, ENABLE);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void GPIOConfiguration(void)
|
||||
{
|
||||
GPIO_InitTypeDef gpio_initstructure;
|
||||
|
||||
gpio_initstructure.GPIO_Mode = GPIO_Mode_AF;
|
||||
gpio_initstructure.GPIO_OType = GPIO_OType_PP;
|
||||
gpio_initstructure.GPIO_PuPd = GPIO_PuPd_UP;
|
||||
gpio_initstructure.GPIO_Speed = GPIO_Speed_2MHz;
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
gpio_initstructure.GPIO_Pin = UART1_GPIO_RX | UART1_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_TX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
GPIO_PinAFConfig(UART1_GPIO, UART1_RX_PIN_SOURCE, GPIO_AF_USART1);
|
||||
|
||||
GPIO_Init(UART1_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
gpio_initstructure.GPIO_Pin = UART2_GPIO_RX | UART2_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_TX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
GPIO_PinAFConfig(UART2_GPIO, UART2_RX_PIN_SOURCE, GPIO_AF_USART2);
|
||||
|
||||
GPIO_Init(UART2_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
gpio_initstructure.GPIO_Pin = UART3_GPIO_TX | UART3_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_TX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
GPIO_PinAFConfig(UART3_GPIO, UART3_RX_PIN_SOURCE, GPIO_AF_USART3);
|
||||
|
||||
GPIO_Init(UART3_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
gpio_initstructure.GPIO_Pin = UART4_GPIO_TX | UART4_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_TX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
GPIO_PinAFConfig(UART4_GPIO, UART4_RX_PIN_SOURCE, GPIO_AF_UART4);
|
||||
|
||||
GPIO_Init(UART4_GPIO, &gpio_initstructure);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_TX;
|
||||
GPIO_PinAFConfig(UART5_TX, UART5_TX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_TX, &gpio_initstructure);
|
||||
|
||||
gpio_initstructure.GPIO_Pin = UART5_GPIO_RX;
|
||||
GPIO_PinAFConfig(UART5_RX, UART5_RX_PIN_SOURCE, GPIO_AF_UART5);
|
||||
GPIO_Init(UART5_RX, &gpio_initstructure);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void NVIC_Configuration(IRQn_Type irq)
|
||||
{
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = irq;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void DmaUartConfig(struct Stm32UsartDma *dma, USART_TypeDef *uart_device, uint32_t SettingRecvLen, void *mem_base_addr)
|
||||
{
|
||||
DMA_InitTypeDef DMA_InitStructure;
|
||||
|
||||
dma->SettingRecvLen = SettingRecvLen;
|
||||
DMA_DeInit(dma->RxStream);
|
||||
while (DMA_GetCmdStatus(dma->RxStream) != DISABLE);
|
||||
DMA_InitStructure.DMA_Channel = dma->RxCh;
|
||||
DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t) &(uart_device->DR);
|
||||
DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)mem_base_addr;
|
||||
DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
|
||||
DMA_InitStructure.DMA_BufferSize = dma->SettingRecvLen;
|
||||
DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
|
||||
DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
|
||||
DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_MemoryDataSize = DMA_PeripheralDataSize_Byte;
|
||||
DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
|
||||
DMA_InitStructure.DMA_Priority = DMA_Priority_High;
|
||||
DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable;
|
||||
DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
|
||||
DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
|
||||
DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
|
||||
DMA_Init(dma->RxStream, &DMA_InitStructure);
|
||||
}
|
||||
|
||||
static void DMAConfiguration(struct SerialHardwareDevice *serial_dev, USART_TypeDef *uart_device)
|
||||
{
|
||||
struct Stm32Usart *serial = CONTAINER_OF(serial_dev->haldev.owner_bus, struct Stm32Usart, serial_bus);
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
|
||||
NVIC_InitTypeDef NVIC_InitStructure;
|
||||
|
||||
USART_ITConfig(uart_device, USART_IT_IDLE , ENABLE);
|
||||
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA1, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE);
|
||||
|
||||
DmaUartConfig(dma, uart_device, serial_cfg->data_cfg.serial_buffer_size, serial_dev->serial_fifo.serial_rx->serial_rx_buffer);
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
DMA_ITConfig(dma->RxStream, DMA_IT_TC, ENABLE);
|
||||
USART_DMACmd(uart_device, USART_DMAReq_Rx, ENABLE);
|
||||
DMA_Cmd(dma->RxStream, ENABLE);
|
||||
|
||||
NVIC_InitStructure.NVIC_IRQChannel = dma->RxIrqCh;
|
||||
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
|
||||
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
|
||||
NVIC_Init(&NVIC_InitStructure);
|
||||
}
|
||||
|
||||
static void SerialCfgParamCheck(struct SerialCfgParam *serial_cfg_default, struct SerialCfgParam *serial_cfg_new)
|
||||
{
|
||||
struct SerialDataCfg *data_cfg_default = &serial_cfg_default->data_cfg;
|
||||
struct SerialDataCfg *data_cfg_new = &serial_cfg_new->data_cfg;
|
||||
|
||||
if((data_cfg_default->serial_baud_rate != data_cfg_new->serial_baud_rate) && (data_cfg_new->serial_baud_rate)) {
|
||||
data_cfg_default->serial_baud_rate = data_cfg_new->serial_baud_rate;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_bit_order != data_cfg_new->serial_bit_order) && (data_cfg_new->serial_bit_order)) {
|
||||
data_cfg_default->serial_bit_order = data_cfg_new->serial_bit_order;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_buffer_size != data_cfg_new->serial_buffer_size) && (data_cfg_new->serial_buffer_size)) {
|
||||
data_cfg_default->serial_buffer_size = data_cfg_new->serial_buffer_size;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_data_bits != data_cfg_new->serial_data_bits) && (data_cfg_new->serial_data_bits)) {
|
||||
data_cfg_default->serial_data_bits = data_cfg_new->serial_data_bits;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_invert_mode != data_cfg_new->serial_invert_mode) && (data_cfg_new->serial_invert_mode)) {
|
||||
data_cfg_default->serial_invert_mode = data_cfg_new->serial_invert_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_parity_mode != data_cfg_new->serial_parity_mode) && (data_cfg_new->serial_parity_mode)) {
|
||||
data_cfg_default->serial_parity_mode = data_cfg_new->serial_parity_mode;
|
||||
}
|
||||
|
||||
if((data_cfg_default->serial_stop_bits != data_cfg_new->serial_stop_bits) && (data_cfg_new->serial_stop_bits)) {
|
||||
data_cfg_default->serial_stop_bits = data_cfg_new->serial_stop_bits;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialInit(struct SerialDriver *serial_drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (configure_info->private_data) {
|
||||
struct SerialCfgParam *serial_cfg_new = (struct SerialCfgParam *)configure_info->private_data;
|
||||
SerialCfgParamCheck(serial_cfg, serial_cfg_new);
|
||||
}
|
||||
|
||||
USART_InitTypeDef USART_InitStructure;
|
||||
|
||||
USART_InitStructure.USART_BaudRate = serial_cfg->data_cfg.serial_baud_rate;
|
||||
|
||||
if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_8) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_8b;
|
||||
} else if (serial_cfg->data_cfg.serial_data_bits == DATA_BITS_9) {
|
||||
USART_InitStructure.USART_WordLength = USART_WordLength_9b;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_1){
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_1;
|
||||
} else if (serial_cfg->data_cfg.serial_stop_bits == STOP_BITS_2) {
|
||||
USART_InitStructure.USART_StopBits = USART_StopBits_2;
|
||||
}
|
||||
|
||||
if (serial_cfg->data_cfg.serial_parity_mode == PARITY_NONE) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_No;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_ODD) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Odd;
|
||||
} else if (serial_cfg->data_cfg.serial_parity_mode == PARITY_EVEN) {
|
||||
USART_InitStructure.USART_Parity = USART_Parity_Even;
|
||||
}
|
||||
|
||||
USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
|
||||
USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
|
||||
USART_Init(serial_hw_cfg->uart_device, &USART_InitStructure);
|
||||
|
||||
USART_Cmd(serial_hw_cfg->uart_device, ENABLE);
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static uint32 Stm32SerialConfigure(struct SerialDriver *serial_drv, int serial_operation_cmd)
|
||||
{
|
||||
NULL_PARAM_CHECK(serial_drv);
|
||||
|
||||
struct SerialHardwareDevice *serial_dev = (struct SerialHardwareDevice *)serial_drv->driver.owner_bus->owner_haldev;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
struct SerialDevParam *serial_dev_param = (struct SerialDevParam *)serial_dev->haldev.private_data;
|
||||
|
||||
switch (serial_operation_cmd)
|
||||
{
|
||||
case OPER_CLR_INT:
|
||||
UART_DISABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, DISABLE);
|
||||
break;
|
||||
case OPER_SET_INT:
|
||||
UART_ENABLE_IRQ(serial_hw_cfg->irq);
|
||||
USART_ITConfig(serial_hw_cfg->uart_device, USART_IT_RXNE, ENABLE);
|
||||
break;
|
||||
case OPER_CONFIG :
|
||||
if (SIGN_OPER_DMA_RX == serial_dev_param->serial_set_mode){
|
||||
DMAConfiguration(serial_dev, serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialPutchar(struct SerialHardwareDevice *serial_dev, char c)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
while (!(serial_hw_cfg->uart_device->SR & USART_FLAG_TXE));
|
||||
serial_hw_cfg->uart_device->DR = c;
|
||||
|
||||
return EOK;
|
||||
}
|
||||
|
||||
static int Stm32SerialGetchar(struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_dev->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
int ch = -1;
|
||||
if (serial_hw_cfg->uart_device->SR & USART_FLAG_RXNE) {
|
||||
ch = serial_hw_cfg->uart_device->DR & 0xff;
|
||||
}
|
||||
|
||||
return ch;
|
||||
}
|
||||
|
||||
static void DmaUartRxIdleIsr(struct SerialHardwareDevice *serial_dev, struct Stm32UsartDma *dma, USART_TypeDef *uart_device)
|
||||
{
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_total_index = dma->SettingRecvLen - DMA_GetCurrDataCounter(dma->RxStream);
|
||||
x_size_t recv_len = recv_total_index - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = recv_total_index;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
USART_ReceiveData(uart_device);
|
||||
}
|
||||
|
||||
static void DmaRxDoneIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (DMA_GetFlagStatus(dma->RxStream, dma->RxFlag) != RESET) {
|
||||
x_base level = CriticalAreaLock();
|
||||
|
||||
x_size_t recv_len = dma->SettingRecvLen - dma->LastRecvIndex;
|
||||
dma->LastRecvIndex = 0;
|
||||
CriticalAreaUnLock(level);
|
||||
|
||||
if (recv_len) SerialSetIsr(serial_dev, SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
|
||||
|
||||
DMA_ClearFlag(dma->RxStream, dma->RxFlag);
|
||||
}
|
||||
}
|
||||
|
||||
static void UartIsr(struct Stm32Usart *serial, struct SerialDriver *serial_drv, struct SerialHardwareDevice *serial_dev)
|
||||
{
|
||||
struct Stm32UsartDma *dma = &serial->dma;
|
||||
struct SerialCfgParam *serial_cfg = (struct SerialCfgParam *)serial_drv->private_data;
|
||||
struct UsartHwCfg *serial_hw_cfg = (struct UsartHwCfg *)serial_cfg->hw_cfg.private_data;
|
||||
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_RXNE) != RESET) {
|
||||
SerialSetIsr(serial_dev, SERIAL_EVENT_RX_IND);
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_RXNE);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_IDLE) != RESET) {
|
||||
DmaUartRxIdleIsr(serial_dev, dma, serial_hw_cfg->uart_device);
|
||||
}
|
||||
if (USART_GetITStatus(serial_hw_cfg->uart_device, USART_IT_TC) != RESET) {
|
||||
USART_ClearITPendingBit(serial_hw_cfg->uart_device, USART_IT_TC);
|
||||
}
|
||||
if (USART_GetFlagStatus(serial_hw_cfg->uart_device, USART_FLAG_ORE) == SET) {
|
||||
USART_ReceiveData(serial_hw_cfg->uart_device);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
struct Stm32Usart serial_1;
|
||||
struct SerialDriver serial_driver_1;
|
||||
struct SerialHardwareDevice serial_device_1;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_1 =
|
||||
{
|
||||
DMA2_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA2_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART1_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART1_IRQn, USART1_IRQHandler, NONE);
|
||||
|
||||
void DMA2_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_1, &serial_driver_1, &serial_device_1);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA2_Stream5_IRQn, DMA2_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
struct Stm32Usart serial_2;
|
||||
struct SerialDriver serial_driver_2;
|
||||
struct SerialHardwareDevice serial_device_2;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_2 =
|
||||
{
|
||||
DMA1_Stream5,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF5,
|
||||
DMA1_Stream5_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART2_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART2_IRQn, USART2_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream5_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_2, &serial_driver_2, &serial_device_2);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream5_IRQn, DMA1_Stream5_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
struct Stm32Usart serial_3;
|
||||
struct SerialDriver serial_driver_3;
|
||||
struct SerialHardwareDevice serial_device_3;
|
||||
|
||||
static const struct Stm32UsartDma usart_dma_3 =
|
||||
{
|
||||
DMA1_Stream1,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF1,
|
||||
DMA1_Stream1_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void USART3_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(USART3_IRQn, USART3_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream1_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_3, &serial_driver_3, &serial_device_3);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream1_IRQn, DMA1_Stream1_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
struct Stm32Usart serial_4;
|
||||
struct SerialDriver serial_driver_4;
|
||||
struct SerialHardwareDevice serial_device_4;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_4 =
|
||||
{
|
||||
DMA1_Stream2,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF2,
|
||||
DMA1_Stream2_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART4_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART4_IRQn, UART4_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream2_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_4, &serial_driver_4, &serial_device_4);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream2_IRQn, DMA1_Stream2_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
struct Stm32Usart serial_5;
|
||||
struct SerialDriver serial_driver_5;
|
||||
struct SerialHardwareDevice serial_device_5;
|
||||
|
||||
static const struct Stm32UsartDma uart_dma_5 =
|
||||
{
|
||||
DMA1_Stream0,
|
||||
DMA_Channel_4,
|
||||
DMA_FLAG_TCIF0,
|
||||
DMA1_Stream0_IRQn,
|
||||
0,
|
||||
0,
|
||||
};
|
||||
|
||||
void UART5_IRQHandler(int irq_num, void *arg)
|
||||
{
|
||||
UartIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(UART5_IRQn, UART5_IRQHandler, NONE);
|
||||
|
||||
void DMA1_Stream0_IRQHandler(int irq_num, void *arg) {
|
||||
DmaRxDoneIsr(&serial_5, &serial_driver_5, &serial_device_5);
|
||||
}
|
||||
DECLARE_HW_IRQ(DMA1_Stream0_IRQn, DMA1_Stream0_IRQHandler, NONE);
|
||||
#endif
|
||||
|
||||
static uint32 Stm32SerialDrvConfigure(void *drv, struct BusConfigureInfo *configure_info)
|
||||
{
|
||||
NULL_PARAM_CHECK(drv);
|
||||
NULL_PARAM_CHECK(configure_info);
|
||||
|
||||
x_err_t ret = EOK;
|
||||
int serial_operation_cmd;
|
||||
struct SerialDriver *serial_drv = (struct SerialDriver *)drv;
|
||||
|
||||
switch (configure_info->configure_cmd)
|
||||
{
|
||||
case OPE_INT:
|
||||
ret = Stm32SerialInit(serial_drv, configure_info);
|
||||
break;
|
||||
case OPE_CFG:
|
||||
serial_operation_cmd = *(int *)configure_info->private_data;
|
||||
ret = Stm32SerialConfigure(serial_drv, serial_operation_cmd);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static const struct SerialDataCfg data_cfg_init =
|
||||
{
|
||||
.serial_baud_rate = BAUD_RATE_115200,
|
||||
.serial_data_bits = DATA_BITS_8,
|
||||
.serial_stop_bits = STOP_BITS_1,
|
||||
.serial_parity_mode = PARITY_NONE,
|
||||
.serial_bit_order = BIT_ORDER_LSB,
|
||||
.serial_invert_mode = NRZ_NORMAL,
|
||||
.serial_buffer_size = SERIAL_RB_BUFSZ,
|
||||
};
|
||||
|
||||
/*manage the serial device operations*/
|
||||
static const struct SerialDrvDone drv_done =
|
||||
{
|
||||
.init = Stm32SerialInit,
|
||||
.configure = Stm32SerialConfigure,
|
||||
};
|
||||
|
||||
/*manage the serial device hal operations*/
|
||||
static struct SerialHwDevDone hwdev_done =
|
||||
{
|
||||
.put_char = Stm32SerialPutchar,
|
||||
.get_char = Stm32SerialGetchar,
|
||||
};
|
||||
|
||||
static int BoardSerialBusInit(struct SerialBus *serial_bus, struct SerialDriver *serial_driver, const char *bus_name, const char *drv_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
/*Init the serial bus */
|
||||
ret = SerialBusInit(serial_bus, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialBusInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Init the serial driver*/
|
||||
ret = SerialDriverInit(serial_driver, drv_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverInit error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
/*Attach the serial driver to the serial bus*/
|
||||
ret = SerialDriverAttachToBus(drv_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDriverAttachToBus error %d\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Attach the serial device to the serial bus*/
|
||||
static int BoardSerialDevBend(struct SerialHardwareDevice *serial_device, void *serial_param, const char *bus_name, const char *dev_name)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
ret = SerialDeviceRegister(serial_device, serial_param, dev_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceInit device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = SerialDeviceAttachToBus(dev_name, bus_name);
|
||||
if (EOK != ret) {
|
||||
KPrintf("hw_serial_init SerialDeviceAttachToBus device %s error %d\n", dev_name, ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int InitHwUsart(void)
|
||||
{
|
||||
x_err_t ret = EOK;
|
||||
|
||||
RCCConfiguration();
|
||||
GPIOConfiguration();
|
||||
|
||||
#ifdef BSP_USING_USART1
|
||||
static struct SerialCfgParam serial_cfg_1;
|
||||
memset(&serial_cfg_1, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_1;
|
||||
memset(&serial_hw_cfg_1, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_1;
|
||||
memset(&serial_dev_param_1, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_1.dma = usart_dma_1;
|
||||
|
||||
serial_driver_1.drv_done = &drv_done;
|
||||
serial_driver_1.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_1.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_1.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_1.uart_device = USART1;
|
||||
serial_hw_cfg_1.irq = USART1_IRQn;
|
||||
serial_cfg_1.hw_cfg.private_data = (void *)&serial_hw_cfg_1;
|
||||
serial_driver_1.private_data = (void *)&serial_cfg_1;
|
||||
|
||||
serial_dev_param_1.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_1.haldev.private_data = (void *)&serial_dev_param_1;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_1.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_1.serial_bus, &serial_driver_1, SERIAL_BUS_NAME_1, SERIAL_DRV_NAME_1);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_1, (void *)&serial_cfg_1, SERIAL_BUS_NAME_1, SERIAL_1_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart1 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART2
|
||||
static struct SerialCfgParam serial_cfg_2;
|
||||
memset(&serial_cfg_2, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_2;
|
||||
memset(&serial_hw_cfg_2, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_2;
|
||||
memset(&serial_dev_param_2, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_2.dma = usart_dma_2;
|
||||
|
||||
serial_driver_2.drv_done = &drv_done;
|
||||
serial_driver_2.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_2.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_2.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_2.uart_device = USART2;
|
||||
serial_hw_cfg_2.irq = USART2_IRQn;
|
||||
serial_cfg_2.hw_cfg.private_data = (void *)&serial_hw_cfg_2;
|
||||
serial_driver_2.private_data = (void *)&serial_cfg_2;
|
||||
|
||||
serial_dev_param_2.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_2.haldev.private_data = (void *)&serial_dev_param_2;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_2.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_2.serial_bus, &serial_driver_2, SERIAL_BUS_NAME_2, SERIAL_DRV_NAME_2);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_2, (void *)&serial_cfg_2, SERIAL_BUS_NAME_2, SERIAL_2_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart2 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_USART3
|
||||
static struct SerialCfgParam serial_cfg_3;
|
||||
memset(&serial_cfg_3, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_3;
|
||||
memset(&serial_hw_cfg_3, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_3;
|
||||
memset(&serial_dev_param_3, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_3.dma = usart_dma_3;
|
||||
|
||||
serial_driver_3.drv_done = &drv_done;
|
||||
serial_driver_3.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_3.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_3.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_3.uart_device = USART3;
|
||||
serial_hw_cfg_3.irq = USART3_IRQn;
|
||||
serial_cfg_3.hw_cfg.private_data = (void *)&serial_hw_cfg_3;
|
||||
serial_driver_3.private_data = (void *)&serial_cfg_3;
|
||||
|
||||
serial_dev_param_3.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_3.haldev.private_data = (void *)&serial_dev_param_3;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_3.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_3.serial_bus, &serial_driver_3, SERIAL_BUS_NAME_3, SERIAL_DRV_NAME_3);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_3, (void *)&serial_cfg_3, SERIAL_BUS_NAME_3, SERIAL_3_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart3 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART4
|
||||
static struct SerialCfgParam serial_cfg_4;
|
||||
memset(&serial_cfg_4, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_4;
|
||||
memset(&serial_hw_cfg_4, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_4;
|
||||
memset(&serial_dev_param_4, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_4.dma = uart_dma_4;
|
||||
|
||||
serial_driver_4.drv_done = &drv_done;
|
||||
serial_driver_4.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_4.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_4.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_4.uart_device = UART4;
|
||||
serial_hw_cfg_4.irq = UART4_IRQn;
|
||||
serial_cfg_4.hw_cfg.private_data = (void *)&serial_hw_cfg_4;
|
||||
serial_driver_4.private_data = (void *)&serial_cfg_4;
|
||||
|
||||
serial_dev_param_4.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_4.haldev.private_data = (void *)&serial_dev_param_4;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_4.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_4.serial_bus, &serial_driver_4, SERIAL_BUS_NAME_4, SERIAL_DRV_NAME_4);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_4, (void *)&serial_cfg_4, SERIAL_BUS_NAME_4, SERIAL_4_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart4 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_UART5
|
||||
static struct SerialCfgParam serial_cfg_5;
|
||||
memset(&serial_cfg_5, 0, sizeof(struct SerialCfgParam));
|
||||
|
||||
static struct UsartHwCfg serial_hw_cfg_5;
|
||||
memset(&serial_hw_cfg_5, 0, sizeof(struct UsartHwCfg));
|
||||
|
||||
static struct SerialDevParam serial_dev_param_5;
|
||||
memset(&serial_dev_param_5, 0, sizeof(struct SerialDevParam));
|
||||
|
||||
serial_5.dma = uart_dma_5;
|
||||
|
||||
serial_driver_5.drv_done = &drv_done;
|
||||
serial_driver_5.configure = &Stm32SerialDrvConfigure;
|
||||
serial_device_5.hwdev_done = &hwdev_done;
|
||||
|
||||
serial_cfg_5.data_cfg = data_cfg_init;
|
||||
|
||||
serial_hw_cfg_5.uart_device = UART5;
|
||||
serial_hw_cfg_5.irq = UART5_IRQn;
|
||||
serial_cfg_5.hw_cfg.private_data = (void *)&serial_hw_cfg_5;
|
||||
serial_driver_5.private_data = (void *)&serial_cfg_5;
|
||||
|
||||
serial_dev_param_5.serial_work_mode = SIGN_OPER_INT_RX;
|
||||
serial_device_5.haldev.private_data = (void *)&serial_dev_param_5;
|
||||
|
||||
NVIC_Configuration(serial_hw_cfg_5.irq);
|
||||
|
||||
ret = BoardSerialBusInit(&serial_5.serial_bus, &serial_driver_5, SERIAL_BUS_NAME_5, SERIAL_DRV_NAME_5);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
|
||||
ret = BoardSerialDevBend(&serial_device_5, (void *)&serial_cfg_5, SERIAL_BUS_NAME_5, SERIAL_5_DEVICE_NAME_0);
|
||||
if (EOK != ret) {
|
||||
KPrintf("InitHwUsart usart5 error ret %u\n", ret);
|
||||
return ERROR;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_STM32F407_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_stm32f407-st-discovery_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* stm32f407-st-discovery feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
#ifndef XS_CONFIG_H__
|
||||
#define XS_CONFIG_H__
|
||||
|
||||
/* Automatically generated file; DO NOT EDIT. */
|
||||
/* XiUOS Project Configuration */
|
||||
|
||||
#define BOARD_CORTEX_M4_EVB
|
||||
#define ARCH_ARM
|
||||
|
||||
/* BOARD_CORTEX_M4_EVB feature */
|
||||
|
||||
#define BSP_USING_DMA
|
||||
#define BSP_USING_GPIO
|
||||
#define PIN_BUS_NAME "pin"
|
||||
#define PIN_DRIVER_NAME "pin_drv"
|
||||
#define PIN_DEVICE_NAME "pin_dev"
|
||||
#define BSP_USING_UART
|
||||
#define BSP_USING_USART1
|
||||
#define SERIAL_BUS_NAME_1 "usart1"
|
||||
#define SERIAL_DRV_NAME_1 "usart1_drv"
|
||||
#define SERIAL_1_DEVICE_NAME_0 "usart1_dev1"
|
||||
#define BSP_USING_USART2
|
||||
#define SERIAL_BUS_NAME_2 "usart2"
|
||||
#define SERIAL_DRV_NAME_2 "usart2_drv"
|
||||
#define SERIAL_2_DEVICE_NAME_0 "usart2_dev2"
|
||||
#define BSP_USING_USART3
|
||||
#define SERIAL_BUS_NAME_3 "usart3"
|
||||
#define SERIAL_DRV_NAME_3 "usart3_drv"
|
||||
#define SERIAL_3_DEVICE_NAME_0 "usart3_dev3"
|
||||
#define BSP_USING_WDT
|
||||
#define WDT_BUS_NAME "wdt"
|
||||
#define WDT_DRIVER_NAME "wdt_drv"
|
||||
#define WDT_DEVICE_NAME "wdt_dev"
|
||||
|
||||
/* config default board resources */
|
||||
|
||||
/* config board app name */
|
||||
|
||||
#define BOARD_APP_NAME "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
|
||||
/* config board service table */
|
||||
|
||||
#define SERVICE_TABLE_ADDRESS 0x20000000
|
||||
|
||||
/* config hardware resources for connection */
|
||||
|
||||
/* Hardware feature */
|
||||
|
||||
#define RESOURCES_SERIAL
|
||||
#define SERIAL_USING_DMA
|
||||
#define SERIAL_RB_BUFSZ 128
|
||||
#define RESOURCES_PIN
|
||||
#define RESOURCES_WDT
|
||||
|
||||
/* Kernel feature */
|
||||
|
||||
/* separate compile(choose none for compile once) */
|
||||
|
||||
#define APP_STARTUP_FROM_FLASH
|
||||
|
||||
/* Memory Management */
|
||||
|
||||
#define MEM_ALIGN_SIZE 8
|
||||
#define MM_PAGE_SIZE 4096
|
||||
|
||||
/* Using small memory allocator */
|
||||
|
||||
#define KERNEL_SMALL_MEM_ALLOC
|
||||
#define SMALL_NUMBER_32B 64
|
||||
#define SMALL_NUMBER_64B 32
|
||||
|
||||
/* Task feature */
|
||||
|
||||
#define USER_APPLICATION
|
||||
|
||||
/* Inter-Task communication */
|
||||
|
||||
#define KERNEL_SEMAPHORE
|
||||
#define KERNEL_MUTEX
|
||||
#define KERNEL_EVENT
|
||||
#define KERNEL_MESSAGEQUEUE
|
||||
#define KERNEL_SOFTTIMER
|
||||
#define SCHED_POLICY_RR_REMAINSLICE
|
||||
#define KTASK_PRIORITY_32
|
||||
#define KTASK_PRIORITY_MAX 32
|
||||
#define TICK_PER_SECOND 1000
|
||||
#define KERNEL_STACK_OVERFLOW_CHECK
|
||||
#define IDLE_KTASK_STACKSIZE 256
|
||||
#define ZOMBIE_KTASK_STACKSIZE 2048
|
||||
|
||||
/* Kernel Console */
|
||||
|
||||
#define KERNEL_CONSOLE
|
||||
#define KERNEL_BANNER
|
||||
#define KERNEL_CONSOLEBUF_SIZE 128
|
||||
|
||||
/* Kernel Hook */
|
||||
|
||||
|
||||
/* Command shell */
|
||||
|
||||
#define TOOL_SHELL
|
||||
#define SHELL_ENTER_CR
|
||||
#define SHELL_ENTER_LF
|
||||
#define SHELL_ENTER_CR_AND_LF
|
||||
|
||||
/* Set shell user control */
|
||||
|
||||
#define SHELL_DEFAULT_USER "letter"
|
||||
#define SHELL_DEFAULT_USER_PASSWORD ""
|
||||
#define SHELL_LOCK_TIMEOUT 10000
|
||||
|
||||
/* Set shell config param */
|
||||
|
||||
#define SHELL_TASK_STACK_SIZE 4096
|
||||
#define SHELL_TASK_PRIORITY 20
|
||||
#define SHELL_MAX_NUMBER 5
|
||||
#define SHELL_PARAMETER_MAX_NUMBER 8
|
||||
#define SHELL_HISTORY_MAX_NUMBER 5
|
||||
#define SHELL_PRINT_BUFFER 128
|
||||
#define SHELL_HELP_SHOW_PERMISSION
|
||||
|
||||
/* Kernel data structure Manage */
|
||||
|
||||
#define KERNEL_QUEUEMANAGE
|
||||
#define KERNEL_WORKQUEUE
|
||||
#define WORKQUEUE_KTASK_STACKSIZE 512
|
||||
#define WORKQUEUE_KTASK_PRIORITY 23
|
||||
#define QUEUE_MAX 16
|
||||
#define KERNEL_WAITQUEUE
|
||||
#define KERNEL_DATAQUEUE
|
||||
|
||||
/* Kernel components init */
|
||||
|
||||
#define KERNEL_COMPONENTS_INIT
|
||||
#define ENV_INIT_KTASK_STACK_SIZE 8192
|
||||
#define KERNEL_USER_MAIN
|
||||
#define NAME_NUM_MAX 32
|
||||
|
||||
/* hash table config */
|
||||
|
||||
#define ID_HTABLE_SIZE 16
|
||||
#define ID_NUM_MAX 128
|
||||
|
||||
/* File system */
|
||||
|
||||
#define FS_VFS
|
||||
#define VFS_USING_WORKDIR
|
||||
#define FS_VFS_DEVFS
|
||||
#define FS_VFS_FATFS
|
||||
|
||||
/* APP Framework */
|
||||
|
||||
/* Perception */
|
||||
|
||||
|
||||
/* connection */
|
||||
|
||||
|
||||
/* Intelligence */
|
||||
|
||||
|
||||
/* Control */
|
||||
|
||||
/* Lib */
|
||||
|
||||
#define LIB
|
||||
#define LIB_POSIX
|
||||
|
||||
/* C++ features */
|
||||
|
||||
#define LIB_NEWLIB
|
||||
|
||||
/* Security */
|
||||
|
||||
|
||||
/* Applications */
|
||||
|
||||
|
||||
/* config stack size and priority of main task */
|
||||
|
||||
#define MAIN_KTASK_STACK_SIZE 2048
|
||||
#define MAIN_KTASK_PRIORITY 10
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
mainmenu "XiUOS Project Configuration"
|
||||
|
||||
config BSP_DIR
|
||||
string
|
||||
option env="BSP_ROOT"
|
||||
default "."
|
||||
|
||||
config KERNEL_DIR
|
||||
string
|
||||
option env="KERNEL_ROOT"
|
||||
default "../.."
|
||||
|
||||
config BOARD_CORTEX_M4_EVB
|
||||
bool
|
||||
select ARCH_ARM
|
||||
default y
|
||||
|
||||
source "$KERNEL_DIR/arch/Kconfig"
|
||||
|
||||
menu "cortex-m4-emulator feature"
|
||||
source "$BSP_DIR/third_party_driver/Kconfig"
|
||||
|
||||
menu "config default board resources"
|
||||
menu "config board app name"
|
||||
config BOARD_APP_NAME
|
||||
string "config board app name"
|
||||
default "/XiUOS_cortex-m4-emulator_app.bin"
|
||||
endmenu
|
||||
|
||||
menu "config board service table"
|
||||
config SERVICE_TABLE_ADDRESS
|
||||
hex "board service table address"
|
||||
default 0x20000000
|
||||
endmenu
|
||||
|
||||
menu "config hardware resources for connection"
|
||||
if CONNECTION_COMMUNICATION_ETHERNET
|
||||
config ETHERNET_UART_NAME
|
||||
string "ethernet uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
if CONNECTION_COMMUNICATION_WIFI
|
||||
config WIFI_UART_NAME
|
||||
string "wifi uart name"
|
||||
default "/dev/usart3_dev3"
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
endmenu
|
||||
|
||||
|
||||
menu "Hardware feature"
|
||||
source "$KERNEL_DIR/resources/Kconfig"
|
||||
endmenu
|
||||
|
||||
source "$KERNEL_DIR/Kconfig"
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
SRC_FILES := board.c
|
||||
|
||||
SRC_DIR := third_party_driver
|
||||
|
||||
|
||||
|
||||
|
||||
include $(KERNEL_ROOT)/compiler.mk
|
||||
|
|
@ -0,0 +1,213 @@
|
|||
# 从零开始构建矽璓工业物联操作系统：使用ARM架构的STM32F407-discovery开发板
|
||||
|
||||
[XiUOS](http://xuos.io/) (X Industrial Ubiquitous Operating System) 矽璓工业物联操作系统是一款面向工业物联场景的泛在操作系统，来自泛在操作系统研究计划。所谓泛在操作系统(UOS: Ubiquitous Operating Systems)，是支持互联网时代人机物融合泛在计算应用模式的新型操作系统，是传统操作系统概念的泛化与延伸。在泛在操作系统技术体系中，不同的泛在计算设备和泛在应用场景需要符合各自特性的不同UOS，XiUOS即是面向工业物联场景的一种UOS，主要由一个极简的微型实时操作系统(RTOS)内核和其上的智能工业物联框架构成，支持工业物联网(IIoT: Industrial Internet of Things)应用。
|
||||
|
||||
>注：最新版README请访问[从零开始构建矽璓工业物联操作系统：使用ARM架构的STM32F407-discovery开发板](https://blog.csdn.net/AIIT_Ubiquitous/article/details/116209686)，如博客内容与本地文档有差异，以网站内容为准。
|
||||
|
||||
## 开发环境搭建
|
||||
|
||||
### 推荐使用：
|
||||
|
||||
**操作系统：** ubuntu18.04 [https://ubuntu.com/download/desktop](https://ubuntu.com/download/desktop)
|
||||
|
||||
更新`ubuntu 18.04`源的方法:（根据自身情况而定，可以不更改）
|
||||
|
||||
第一步:打开sources.list文件
|
||||
|
||||
```c
|
||||
sudo vim /etc/apt/sources.list
|
||||
```
|
||||
|
||||
第二步:将以下内容复制到sources.list文件
|
||||
|
||||
```c
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
|
||||
deb http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-security main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-updates main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-proposed main restricted universe multiverse
|
||||
deb-src http://mirrors.aliyun.com/ubuntu/ bionic-backports main restricted universe multiverse
|
||||
```
|
||||
|
||||
第三步:更新源和系统软件
|
||||
|
||||
```c
|
||||
sudo apt-get update
|
||||
sudo apt-get upgrade
|
||||
```
|
||||
|
||||
**开发工具推荐使用 VSCode ，VScode下载地址为：** VSCode [https://code.visualstudio.com/](https://code.visualstudio.com/)，推荐下载地址为 [http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb](http://vscode.cdn.azure.cn/stable/3c4e3df9e89829dce27b7b5c24508306b151f30d/code_1.55.2-1618307277_amd64.deb)
|
||||
|
||||
### 依赖包安装：
|
||||
|
||||
```
|
||||
$ sudo apt install build-essential pkg-config git
|
||||
$ sudo apt install gcc make libncurses5-dev openssl libssl-dev bison flex libelf-dev autoconf libtool gperf libc6-dev
|
||||
```
|
||||
|
||||
**XiUOS操作系统源码下载：** XiUOS [https://forgeplus.trustie.net/projects/xuos/xiuos](https://forgeplus.trustie.net/projects/xuos/xiuos)
|
||||
|
||||
新建一个空文件夹并进入文件夹中，并下载源码，具体命令如下：
|
||||
|
||||
```c
|
||||
mkdir test && cd test
|
||||
git clone https://git.trustie.net/xuos/xiuos.git
|
||||
```
|
||||
|
||||
打开源码文件包可以看到以下目录：
|
||||
| 名称 | 说明 |
|
||||
| -- | -- |
|
||||
| application | 应用代码 |
|
||||
| board | 板级支持包 |
|
||||
| framework | 应用框架 |
|
||||
| fs | 文件系统 |
|
||||
| kernel | 内核源码 |
|
||||
| resources | 驱动文件 |
|
||||
| tool | 系统工具 |
|
||||
|
||||
使用VScode打开代码，具体操作步骤为：在源码文件夹下打开系统终端，输入`code .`即可打开VScode开发环境，如下图所示：
|
||||
|
||||
<div align= "center">
|
||||
<img src = img/vscode.jpg width =1000>
|
||||
</div>
|
||||
|
||||
### 裁减配置工具的下载
|
||||
|
||||
裁减配置工具：
|
||||
|
||||
**工具地址：** kconfig-frontends [https://forgeplus.trustie.net/projects/xuos/kconfig-frontends](https://forgeplus.trustie.net/projects/xuos/kconfig-frontends)，下载与安装的具体命令如下：
|
||||
|
||||
```c
|
||||
mkdir kfrontends && cd kfrontends
|
||||
git clone https://git.trustie.net/xuos/kconfig-frontends.git
|
||||
```
|
||||
|
||||
下载源码后按以下步骤执行软件安装：
|
||||
|
||||
```c
|
||||
cd kconfig-frontends
|
||||
./xs_build.sh
|
||||
```
|
||||
|
||||
### 编译工具链：
|
||||
|
||||
ARM： arm-none-eabi(`gcc version 6.3.1`)，默认安装到Ubuntu的/usr/bin/arm-none-eabi-，使用如下命令行下载和安装。
|
||||
|
||||
```shell
|
||||
$ sudo apt install gcc-arm-none-eabi
|
||||
```
|
||||
|
||||
# 在STM32F407-DISCOVERY上创建第一个应用 --helloworld
|
||||
|
||||
## 1. 简介
|
||||
|
||||
| 硬件 | 描述 |
|
||||
| -- | -- |
|
||||
|芯片型号| Stm32F407VGT6|
|
||||
|CPU|arm cortex-m|
|
||||
|主频| 168MHz |
|
||||
|片内SRAM| 192KB |
|
||||
|片上FLASH| 1MB |
|
||||
| 外设 | -- |
|
||||
| | ADC、DAC、USB、GPIO、UART、SPI、SDIO、RTC、CAN、DMA、MAC、I²C、WDT、Timer等 |
|
||||
|
||||
XiUOS板级驱动当前支持使用GPIO、I2C、LCD、USB、RTC、SPI、Timer、UART和WDT等。
|
||||
|
||||
## 2. 编译说明
|
||||
|
||||
### 编辑环境：`Ubuntu18.04`
|
||||
|
||||
### 编译工具链：`arm-none-eabi-gcc`
|
||||
使用`VScode`打开工程的方法有多种，本文介绍一种快捷键，在项目目录下将`code .`输入linux系统命令终端即可打开目标项目
|
||||
|
||||
修改`applications`文件夹下`main.c`
|
||||
在输出函数中写入 `Hello, world!!! \n Running on stm32f407-st-discovery`完成代码编辑。
|
||||
|
||||
|
||||
|
||||
编译步骤：
|
||||
|
||||
1.在VScode命令终端中执行以下命令，生成配置文件
|
||||
|
||||
```c
|
||||
make BOARD=stm32f407-st-discovery menuconfig
|
||||
```
|
||||
|
||||
2.在menuconfig界面配置需要关闭和开启的功能，按回车键进入下级菜单，按Y键选中需要开启的功能，按N键选中需要关闭的功能，配置结束后保存并退出（本例旨在演示简单的输出例程，所以没有需要配置的选项，双击快捷键ESC退出配置）
|
||||
|
||||
|
||||
|
||||
退出时选择`yes`保存上面所配置的内容，如下图所示：
|
||||
|
||||
|
||||
|
||||
3.继续执行以下命令，进行编译
|
||||
|
||||
```c
|
||||
make BOARD=stm32f407-st-discovery
|
||||
```
|
||||
|
||||
4.如果编译正确无误，会产生XiUOS_stm32f407-st-discovery.elf、XiUOS_stm32f407-st-discovery.bin文件。其中XiUOS_stm32f407-st-discovery.bin需要烧写到设备中进行运行。
|
||||
|
||||
## 3. 烧写及执行
|
||||
|
||||
将 BOARD=stm32f407-st-discovery开发板SWD经 st-link 转接到USB接口，然后使用st-flash工具进行烧写bin文件。
|
||||
|
||||
|
||||
|
||||
### 烧写工具
|
||||
|
||||
ARM：ST-LINK（ST-LINK V2实物如图，可在购物网站搜索关键字购买）
|
||||
|
||||
|
||||
|
||||
下载并以下执行命令以下命令安装st-link工具(本文使用v1.5.1版本)，下载地址为：[http://101.36.126.201:8011/stlink.zip](http://101.36.126.201:8011/stlink.zip)
|
||||
|
||||
```
|
||||
sudo apt install libusb-dev
|
||||
sudo apt install libusb-1.0-0-dev
|
||||
sudo apt install cmake
|
||||
cd stlink
|
||||
make
|
||||
cd build/Release && make install DESTDIR=_install
|
||||
```
|
||||
|
||||
将生成的st-flash（在stlink/build/Release/bin文件夹下）复制到/usr/bin下就可使用了
|
||||
|
||||
代码根目录下执行st-flash工具烧录
|
||||
|
||||
```
|
||||
sudo st-flash write build/XiUOS_stm32f407-st-discovery.bin 0x8000000
|
||||
```
|
||||
|
||||
此外，推荐用户使用putty作为终端工具，安装命令如下：
|
||||
|
||||
```c
|
||||
sudo apt install putty
|
||||
```
|
||||
|
||||
打开putty配置串口信息
|
||||
|
||||
```c
|
||||
sudo puty
|
||||
```
|
||||
|
||||
选择ttyUSB0（这个端口号根据具体情况而定），配置波特率为115200。
|
||||
|
||||
|
||||
|
||||
注意：选择正确的终端端口号，最后可以执行以下命令，清除配置文件和编译生成的文件
|
||||
|
||||
```c
|
||||
make BOARD=stm32f407-st-discovery distclean
|
||||
```
|
||||
|
||||
### 3.1 运行结果
|
||||
|
||||
如果编译 & 烧写无误，将会在串口终端上看到信息打印输出，(终端串口引脚为PB6、PB7)。
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,125 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.c
|
||||
* @brief support cortex-m4-emulator-board init configure and start-up
|
||||
* @version 1.0
|
||||
* @author fudan
|
||||
* @date 2021-08-26
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.c
|
||||
Description: support cortex-m4-emulator-board init configure and driver/task/... init
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-04-25
|
||||
Author: AIIT XUOS Lab
|
||||
Modification:
|
||||
1. support cortex-m4-emulator-board InitBoardHardware
|
||||
*************************************************/
|
||||
|
||||
#include <xiuos.h>
|
||||
#include "hardware_rcc.h"
|
||||
#include "board.h"
|
||||
#include "connect_usart.h"
|
||||
#include "misc.h"
|
||||
#include <xs_service.h>
|
||||
|
||||
|
||||
|
||||
static void ClockConfiguration()
|
||||
{
|
||||
int cr,cfgr,pllcfgr;
|
||||
int cr1,cfgr1,pllcfgr1;
|
||||
RCC->APB1ENR |= RCC_APB1ENR_PWREN;
|
||||
PWR->CR |= PWR_CR_VOS;
|
||||
RCC_HSEConfig(RCC_HSE_ON);
|
||||
if (RCC_WaitForHSEStartUp() == SUCCESS)
|
||||
{
|
||||
RCC_HCLKConfig(RCC_SYSCLK_Div1);
|
||||
RCC_PCLK2Config(RCC_HCLK_Div2);
|
||||
RCC_PCLK1Config(RCC_HCLK_Div4);
|
||||
RCC_PLLConfig(RCC_PLLSource_HSE, 8, 336, 2, 7);
|
||||
|
||||
RCC_PLLCmd(ENABLE);
|
||||
while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET);
|
||||
|
||||
FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
|
||||
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
|
||||
|
||||
while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
|
||||
}
|
||||
SystemCoreClockUpdate();
|
||||
}
|
||||
|
||||
void NVIC_Configuration(void)
|
||||
{
|
||||
#ifdef VECT_TAB_RAM
|
||||
NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
|
||||
#else
|
||||
NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
|
||||
#endif
|
||||
|
||||
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
|
||||
}
|
||||
|
||||
void SysTickConfiguration(void)
|
||||
{
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
uint32 cnts;
|
||||
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
|
||||
cnts = (uint32)rcc_clocks.HCLK_Frequency / TICK_PER_SECOND;
|
||||
cnts = cnts / 8;
|
||||
|
||||
SysTick_Config(cnts);
|
||||
SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
|
||||
}
|
||||
|
||||
void SysTick_Handler(int irqn, void *arg)
|
||||
{
|
||||
|
||||
TickAndTaskTimesliceUpdate();
|
||||
|
||||
}
|
||||
DECLARE_HW_IRQ(SysTick_IRQn, SysTick_Handler, NONE);
|
||||
|
||||
|
||||
void InitBoardHardware()
|
||||
{
|
||||
int i = 0;
|
||||
int ret = 0;
|
||||
ClockConfiguration();
|
||||
|
||||
NVIC_Configuration();
|
||||
|
||||
SysTickConfiguration();
|
||||
#ifdef BSP_USING_UART
|
||||
Stm32HwUsartInit();
|
||||
#endif
|
||||
#ifdef KERNEL_CONSOLE
|
||||
InstallConsole(KERNEL_CONSOLE_BUS_NAME, KERNEL_CONSOLE_DRV_NAME, KERNEL_CONSOLE_DEVICE_NAME);
|
||||
|
||||
RCC_ClocksTypeDef rcc_clocks;
|
||||
RCC_GetClocksFreq(&rcc_clocks);
|
||||
KPrintf("HCLK_Frequency %d, PCLK1_Frequency %d, PCLK2_Frequency %d, SYSCLK_Frequency %d\n", rcc_clocks.HCLK_Frequency, rcc_clocks.PCLK1_Frequency, rcc_clocks.PCLK2_Frequency, rcc_clocks.SYSCLK_Frequency);
|
||||
|
||||
KPrintf("\nconsole init completed.\n");
|
||||
KPrintf("board initialization......\n");
|
||||
#endif
|
||||
|
||||
InitBoardMemory((void*)MEMORY_START_ADDRESS, (void*)MEMORY_END_ADDRESS);
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2020 AIIT XUOS Lab
|
||||
* XiUOS is licensed under Mulan PSL v2.
|
||||
* You can use this software according to the terms and conditions of the Mulan PSL v2.
|
||||
* You may obtain a copy of Mulan PSL v2 at:
|
||||
* http://license.coscl.org.cn/MulanPSL2
|
||||
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
|
||||
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
|
||||
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
|
||||
* See the Mulan PSL v2 for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file board.h
|
||||
* @brief define cortex-m4-emulator-board init configure and start-up function
|
||||
* @version 1.0
|
||||
* @author AIIT fudan Lab
|
||||
* @date 2021-04-25
|
||||
*/
|
||||
|
||||
/*************************************************
|
||||
File name: board.h
|
||||
Description: define cortex-m4-emulator-board board init function and struct
|
||||
Others:
|
||||
History:
|
||||
1. Date: 2021-08-25
|
||||
Author: AIIT fudan Lab
|
||||
Modification:
|
||||
1. define cortex-m4-emulator-board InitBoardHardware
|
||||
2. define cortex-m4-emulator-board data and bss struct
|
||||
*************************************************/
|
||||
|
||||
#ifndef BOARD_H
|
||||
#define BOARD_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
extern int __stack_end__;
|
||||
extern unsigned int g_service_table_start;
|
||||
extern unsigned int g_service_table_end;
|
||||
|
||||
#define SURPORT_MPU
|
||||
|
||||
#define MEMORY_START_ADDRESS (&__stack_end__)
|
||||
#define MEM_OFFSET 128
|
||||
#define MEMORY_END_ADDRESS (0x20000000 + MEM_OFFSET * 1024)
|
||||
|
||||
|
||||
#ifdef SEPARATE_COMPILE
|
||||
typedef int (*main_t)(int argc, char *argv[]);
|
||||
typedef void (*exit_t)(void);
|
||||
struct userspace_s
|
||||
{
|
||||
main_t us_entrypoint;
|
||||
exit_t us_taskquit;
|
||||
uintptr_t us_textstart;
|
||||
uintptr_t us_textend;
|
||||
uintptr_t us_datasource;
|
||||
uintptr_t us_datastart;
|
||||
uintptr_t us_dataend;
|
||||
uintptr_t us_bssstart;
|
||||
uintptr_t us_bssend;
|
||||
uintptr_t us_heapend;
|
||||
};
|
||||
#define USERSPACE (( struct userspace_s *)(0x08080000))
|
||||
|
||||
#ifndef SERVICE_TABLE_ADDRESS
|
||||
#define SERVICE_TABLE_ADDRESS (0x20000000)
|
||||
#endif
|
||||
|
||||
#define USER_SRAM_SIZE 64
|
||||
#define USER_MEMORY_START_ADDRESS (USERSPACE->us_bssend)
|
||||
#define USER_MEMORY_END_ADDRESS (0x10000000 + USER_SRAM_SIZE * 1024)
|
||||
#endif
|
||||
|
||||
void InitBoardHardware(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,17 @@
|
|||
export CROSS_COMPILE ?=/usr/bin/arm-none-eabi-
|
||||
|
||||
export CFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -fgnu89-inline -Wa,-mimplicit-it=thumb -Werror
|
||||
export AFLAGS := -c -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -x assembler-with-cpp -Wa,-mimplicit-it=thumb -gdwarf-2
|
||||
export LFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_cortex-m4-emulator.map,-cref,-u,Reset_Handler -T $(BSP_ROOT)/link.lds
|
||||
export CXXFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Dgcc -O0 -gdwarf-2 -g -Werror
|
||||
|
||||
export APPLFLAGS := -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -Wl,--gc-sections,-Map=XiUOS_app.map,-cref,-u, -T $(BSP_ROOT)/link_userspace.lds
|
||||
|
||||
|
||||
export DEFINES := -DHAVE_CCONFIG_H -DSTM32F407xx -DUSE_HAL_DRIVER -DHAVE_SIGINFO
|
||||
|
||||
export USING_NEWLIB =1
|
||||
export USING_VFS = 1
|
||||
export USING_SPI = 1
|
||||
export ARCH = arm
|
||||
export USING_LORA = 1
|
||||
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Loading…
Reference in New Issue